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[RISCV] Fix copy/paste mistake in Sh3Add_UWPat. #161923

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Merged
merged 1 commit into from
Oct 7, 2025
Merged

[RISCV] Fix copy/paste mistake in Sh3Add_UWPat. #161923

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4 changes: 2 additions & 2 deletions llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
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Original file line number Diff line number Diff line change
Expand Up @@ -808,9 +808,9 @@ multiclass Sh2Add_UWPat<Instruction sh2add_uw> {
}

multiclass Sh3Add_UWPat<Instruction sh3add_uw> {
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0xFFFFFFF8),
def : Pat<(i64 (add_like_non_imm12 (and (shl GPR:$rs1, (i64 3)), 0x7FFFFFFFF),
(XLenVT GPR:$rs2))),
(sh3add_uw (XLenVT (SRLIW GPR:$rs1, 3)), GPR:$rs2)>;
(sh3add_uw GPR:$rs1, GPR:$rs2)>;
// Use SRLI to clear the LSBs and SHXADD_UW to mask and shift.
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0x7FFFFFFF8),
(XLenVT GPR:$rs2))),
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10 changes: 1 addition & 9 deletions llvm/test/CodeGen/RISCV/rv64zba.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -409,15 +409,11 @@ define i64 @sh3adduw_2(i64 %0, i64 %1) {
;
; RV64ZBA-LABEL: sh3adduw_2:
; RV64ZBA: # %bb.0:
; RV64ZBA-NEXT: slli a0, a0, 3
; RV64ZBA-NEXT: srli a0, a0, 3
; RV64ZBA-NEXT: sh3add.uw a0, a0, a1
; RV64ZBA-NEXT: ret
;
; RV64XANDESPERF-LABEL: sh3adduw_2:
; RV64XANDESPERF: # %bb.0:
; RV64XANDESPERF-NEXT: slli a0, a0, 3
; RV64XANDESPERF-NEXT: srli a0, a0, 3
; RV64XANDESPERF-NEXT: nds.lea.d.ze a0, a1, a0
; RV64XANDESPERF-NEXT: ret
%3 = shl i64 %0, 3
Expand All @@ -436,15 +432,11 @@ define i64 @sh3adduw_3(i64 %0, i64 %1) {
;
; RV64ZBA-LABEL: sh3adduw_3:
; RV64ZBA: # %bb.0:
; RV64ZBA-NEXT: slli a0, a0, 3
; RV64ZBA-NEXT: srli a0, a0, 3
; RV64ZBA-NEXT: sh3add.uw a0, a0, a1
; RV64ZBA-NEXT: ret
;
; RV64XANDESPERF-LABEL: sh3adduw_3:
; RV64XANDESPERF: # %bb.0:
; RV64XANDESPERF-NEXT: slli a0, a0, 3
; RV64XANDESPERF-NEXT: srli a0, a0, 3
; RV64XANDESPERF-NEXT: nds.lea.d.ze a0, a1, a0
; RV64XANDESPERF-NEXT: ret
%3 = shl i64 %0, 3
Expand Down Expand Up @@ -2681,7 +2673,7 @@ define i64 @srliw_3_sh3add(ptr %0, i32 signext %1) {
; RV64ZBA-LABEL: srliw_3_sh3add:
; RV64ZBA: # %bb.0:
; RV64ZBA-NEXT: srliw a1, a1, 3
; RV64ZBA-NEXT: sh3add.uw a0, a1, a0
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srliw always puts 0s in the upper 32 bits so the .uw here isn't necessary. So I don't think the mistake can cause a miscompile.

; RV64ZBA-NEXT: sh3add a0, a1, a0
; RV64ZBA-NEXT: ld a0, 0(a0)
; RV64ZBA-NEXT: ret
;
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