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[Hexagon] Use fast-math flags #162274

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Merged
merged 2 commits into from
Oct 9, 2025
Merged

[Hexagon] Use fast-math flags #162274

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3adf0fc
[Hexagon] Use fast-math flags
paperchalice Oct 7, 2025
c7c6da8
revert clang-format
paperchalice Oct 9, 2025
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11 changes: 4 additions & 7 deletions llvm/lib/Target/Hexagon/Hexagon.td
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Original file line number Diff line number Diff line change
Expand Up @@ -108,10 +108,8 @@ def FeatureNVS: SubtargetFeature<"nvs", "UseNewValueStores", "true",
"Support for new-value stores", [FeaturePackets]>;
def FeatureSmallData: SubtargetFeature<"small-data", "UseSmallData", "true",
"Allow GP-relative addressing of global variables">;
def FeatureDuplex: SubtargetFeature<"duplex", "EnableDuplex", "true",
"Enable generation of duplex instruction">;
def FeatureUnsafeFP: SubtargetFeature<"unsafe-fp", "UseUnsafeMath", "true",
"Use unsafe FP math">;
def FeatureDuplex : SubtargetFeature<"duplex", "EnableDuplex", "true",
"Enable generation of duplex instruction">;
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Unrelated change. Please remove this

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clang-format did these, will revert them.

def FeatureReservedR19: SubtargetFeature<"reserved-r19", "ReservedR19",
"true", "Reserve register R19">;
def FeatureNoreturnStackElim: SubtargetFeature<"noreturn-stack-elim",
Expand Down Expand Up @@ -165,9 +163,8 @@ def UseHVXIEEEFP : Predicate<"HST->useHVXIEEEFPOps()">,
def UseHVXQFloat : Predicate<"HST->useHVXQFloatOps()">,
AssemblerPredicate<(all_of ExtensionHVXQFloat)>;
def UseHVXFloatingPoint: Predicate<"HST->useHVXFloatingPoint()">;
def HasMemNoShuf : Predicate<"HST->hasMemNoShuf()">,
AssemblerPredicate<(all_of FeatureMemNoShuf)>;
def UseUnsafeMath : Predicate<"HST->useUnsafeMath()">;
def HasMemNoShuf : Predicate<"HST->hasMemNoShuf()">,
AssemblerPredicate<(all_of FeatureMemNoShuf)>;
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Same as above

def NotOptTinyCore : Predicate<"!HST->isTinyCore() ||"
"MF->getFunction().hasOptSize()"> {
let RecomputePerFunction = 1;
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7 changes: 5 additions & 2 deletions llvm/lib/Target/Hexagon/HexagonPatterns.td
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Expand Up @@ -1611,8 +1611,11 @@ def DfMpy: OutPatFrag<(ops node:$Rs, node:$Rt),
$Rt, $Rs),
$Rs, $Rt)>;

let Predicates = [HasV67,UseUnsafeMath], AddedComplexity = 50 in {
def: Pat<(fmul F64:$Rs, F64:$Rt), (DfMpy $Rs, $Rt)>;
def fmul_afn : PatFrag<(ops node:$a, node:$b), (fmul node:$a, node:$b), [{
return N->getFlags().hasApproximateFuncs();
}]>;
let Predicates = [HasV67], AddedComplexity = 50 in {
def : Pat<(fmul_afn F64:$Rs, F64:$Rt), (DfMpy $Rs, $Rt)>;
}
let Predicates = [HasV67] in {
def: OpR_RR_pat<F2_dfmin, pf2<fminimumnum>, f64, F64>;
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2 changes: 0 additions & 2 deletions llvm/lib/Target/Hexagon/HexagonSubtarget.h
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Expand Up @@ -54,7 +54,6 @@ class HexagonSubtarget : public HexagonGenSubtargetInfo {
bool UseNewValueJumps = false;
bool UseNewValueStores = false;
bool UseSmallData = false;
bool UseUnsafeMath = false;
bool UseZRegOps = false;
bool UseHVXIEEEFPOps = false;
bool UseHVXQFloatOps = false;
Expand Down Expand Up @@ -234,7 +233,6 @@ class HexagonSubtarget : public HexagonGenSubtargetInfo {
bool useNewValueJumps() const { return UseNewValueJumps; }
bool useNewValueStores() const { return UseNewValueStores; }
bool useSmallData() const { return UseSmallData; }
bool useUnsafeMath() const { return UseUnsafeMath; }
bool useZRegOps() const { return UseZRegOps; }
bool useCabac() const { return UseCabac; }

Expand Down
7 changes: 0 additions & 7 deletions llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
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Expand Up @@ -250,13 +250,6 @@ HexagonTargetMachine::getSubtargetImpl(const Function &F) const {
CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
std::string FS =
FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
// Append the preexisting target features last, so that +mattr overrides
// the "unsafe-fp-math" function attribute.
// Creating a separate target feature is not strictly necessary, it only
// exists to make "unsafe-fp-math" force creating a new subtarget.

if (F.getFnAttribute("unsafe-fp-math").getValueAsBool())
FS = FS.empty() ? "+unsafe-fp" : "+unsafe-fp," + FS;

auto &I = SubtargetMap[CPU + FS];
if (!I) {
Expand Down
8 changes: 3 additions & 5 deletions llvm/test/CodeGen/Hexagon/fmul-v67.ll
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Expand Up @@ -29,7 +29,7 @@ b2:
; CHECK: [[R22]] += dfmpylh([[R20]],[[R21]])
; CHECK: [[R22]] += dfmpylh([[R21]],[[R20]])
; CHECK: [[R22]] += dfmpyhh([[R20]],[[R21]])
define double @test_02(double %a0, double %a1) #2 {
define double @test_02(double %a0, double %a1) #1 {
b2:
%v3 = fmul double %a0, %a1
ret double %v3
Expand All @@ -40,13 +40,11 @@ b2:
; CHECK: [[R30]] += dfmpylh(r1:0,r3:2)
; CHECK: [[R30]] += dfmpylh(r3:2,r1:0)
; CHECK: [[R30]] += dfmpyhh(r1:0,r3:2)
define double @test_03(double %a0, double %a1) #3 {
define double @test_03(double %a0, double %a1) #1 {
b2:
%v3 = fmul double %a0, %a1
%v3 = fmul afn double %a0, %a1
ret double %v3
}

attributes #0 = { nounwind }
attributes #1 = { nounwind "target-cpu"="hexagonv67" }
attributes #2 = { nounwind "target-cpu"="hexagonv67" "unsafe-fp-math"="false" }
attributes #3 = { nounwind "target-cpu"="hexagonv67" "unsafe-fp-math"="true" }
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