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[AMDGPU] Do not put memory instructions in *ALU SchedGroups #162560

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Merged
merged 4 commits into from
Oct 13, 2025
Merged

[AMDGPU] Do not put memory instructions in *ALU SchedGroups #162560

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9f380e9
[AMDGPU] Do not put memory instructions in *ALU SchedGroups
jrbyrnes Oct 8, 2025
0beb65a
Fix copy/paste bug
jrbyrnes Oct 10, 2025
7731acc
use mayLoadOrStore
jrbyrnes Oct 10, 2025
25dd993
Add braces
jrbyrnes Oct 13, 2025
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6 changes: 3 additions & 3 deletions llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2394,18 +2394,18 @@ bool SchedGroup::canAddMI(const MachineInstr &MI) const {
else if (((SGMask & SchedGroupMask::ALU) != SchedGroupMask::NONE) &&
(TII->isVALU(MI) || TII->isMFMAorWMMA(MI) || TII->isSALU(MI) ||
TII->isTRANS(MI)))
Result = !(MI.mayLoad() || MI.mayLoad());
Result = !(MI.mayLoad() || MI.mayStore());

else if (((SGMask & SchedGroupMask::VALU) != SchedGroupMask::NONE) &&
TII->isVALU(MI) && !TII->isMFMAorWMMA(MI) && !TII->isTRANS(MI))
// Some memory instructions may be marked as VALU (e.g. BUFFER_LOAD_*_LDS).
// For our purposes, these shall not be classified as VALU as this results
// in unexpected behavior.
Result = !(MI.mayLoad() || MI.mayLoad());
Result = !(MI.mayLoad() || MI.mayStore());

else if (((SGMask & SchedGroupMask::SALU) != SchedGroupMask::NONE) &&
TII->isSALU(MI))
Result = !(MI.mayLoad() || MI.mayLoad());
Result = !(MI.mayLoad() || MI.mayStore());

else if (((SGMask & SchedGroupMask::MFMA) != SchedGroupMask::NONE) &&
TII->isMFMAorWMMA(MI))
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