Skip to content

[TableGen] List the indices of sub-operands #163723

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Oct 21, 2025
Merged

[TableGen] List the indices of sub-operands #163723

Show file tree
Hide file tree
Changes from 2 commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
d940ad2
[TableGen] List the indices of sub-operands
statham-arm Oct 15, 2025
620553a
Fix build failure in CI
statham-arm Oct 16, 2025
177955b
Use NamespaceEmitter as suggested in review
statham-arm Oct 20, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -882,7 +882,7 @@ static bool producesFalseLanesZero(MachineInstr &MI,
continue;
// Skip the lr predicate reg
int PIdx = llvm::findFirstVPTPredOperandIdx(MI);
if (PIdx != -1 && (int)MO.getOperandNo() == PIdx + 2)
if (PIdx != -1 && MO.getOperandNo() == PIdx + ARM::SUBOP_vpred_n_tp_reg)
continue;

// Check that this instruction will produce zeros in its false lanes:
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -534,7 +534,7 @@ bool MVETPAndVPTOptimisations::ConvertTailPredLoop(MachineLoop *ML,
Register LR = LoopPhi->getOperand(0).getReg();
for (MachineInstr *MI : MVEInstrs) {
int Idx = findFirstVPTPredOperandIdx(*MI);
MI->getOperand(Idx + 2).setReg(LR);
MI->getOperand(Idx + ARM::SUBOP_vpred_n_tp_reg).setReg(LR);
}
}

Expand Down
14 changes: 14 additions & 0 deletions llvm/utils/TableGen/InstrInfoEmitter.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1135,6 +1135,20 @@ void InstrInfoEmitter::run(raw_ostream &OS) {

OS << "\n};\n} // end namespace llvm\n";

OS << "namespace llvm::" << Target.getInstNamespace() << " {\n";
for (const Record *R : Records.getAllDerivedDefinitions("Operand")) {
if (R->isAnonymous())
continue;
if (const DagInit *D = R->getValueAsDag("MIOperandInfo")) {
for (unsigned i = 0, e = D->getNumArgs(); i < e; ++i) {
if (const StringInit *Name = D->getArgName(i))
OS << " constexpr unsigned SUBOP_" << R->getName() << "_"
<< Name->getValue() << " = " << i << ";\n";
}
}
}
OS << "} // end namespace llvm::" << Target.getInstNamespace() << "\n";
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Use NamespaceEmitter for this?

Copy link
Collaborator Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Thanks, I didn't know about that helper. (In my defence, apparently neither did anyone who wrote the surrounding code!)


OS << "#endif // GET_INSTRINFO_HEADER\n\n";

OS << "#ifdef GET_INSTRINFO_HELPER_DECLS\n";
Expand Down