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22 changes: 11 additions & 11 deletions mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
Original file line number Diff line number Diff line change
Expand Up @@ -379,28 +379,28 @@ def XeGPU_LayoutAttr : XeGPUAttr<"Layout", "layout", [DistributeLayoutAttr]> {
);

let builders = [
AttrBuilder<(ins "llvm::ArrayRef<int32_t>": $lane_layout,
AttrBuilder<(ins "llvm::ArrayRef<int32_t>": $inst_data,
"llvm::ArrayRef<int32_t>": $lane_layout,
"llvm::ArrayRef<int32_t>": $lane_data),
[{
auto sg_layout = DenseI32ArrayAttr();
auto sg_data = DenseI32ArrayAttr();
auto inst_data = DenseI32ArrayAttr();
auto order = DenseI32ArrayAttr();
return $_get($_ctxt, sg_layout, sg_data, inst_data,
return $_get($_ctxt, sg_layout, sg_data,
DenseI32ArrayAttr::get($_ctxt, inst_data),
DenseI32ArrayAttr::get($_ctxt, lane_layout),
DenseI32ArrayAttr::get($_ctxt, lane_data), order);
}]>,
AttrBuilder<(ins "llvm::ArrayRef<int32_t>": $lane_layout,
"llvm::ArrayRef<int32_t>": $lane_data,
"llvm::ArrayRef<int32_t>": $order),
"llvm::ArrayRef<int32_t>": $lane_data),
[{
return $_get($_ctxt,
/*sg_layout =*/ nullptr,
/*sg_data =*/ nullptr,
/*inst_data =*/ nullptr,
auto sg_layout = DenseI32ArrayAttr();
auto sg_data = DenseI32ArrayAttr();
auto inst_data = DenseI32ArrayAttr();
auto order = DenseI32ArrayAttr();
return $_get($_ctxt, sg_layout, sg_data, inst_data,
DenseI32ArrayAttr::get($_ctxt, lane_layout),
DenseI32ArrayAttr::get($_ctxt, lane_data),
DenseI32ArrayAttr::get($_ctxt, order));
DenseI32ArrayAttr::get($_ctxt, lane_data), order);
}]>,
AttrBuilder<(ins "DenseI32ArrayAttr": $lane_layout,
"DenseI32ArrayAttr": $lane_data,
Expand Down
30 changes: 0 additions & 30 deletions mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTargetInfo.h

This file was deleted.

7 changes: 6 additions & 1 deletion mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,12 @@ def XeGPUPropagateLayout : Pass<"xegpu-propagate-layout"> {
let options = [Option<
"printOnly", "print-analysis-only", "bool",
/*default=*/"false",
"Print the result of layout propagation analysis and exit.">];
"Print the result of layout propagation analysis and exit.">,
Option<
"layoutKind", "layout-kind", "std::string",
/*default=*/"\"lane\"",
"Propagate a `sg` / `inst` / `lane` level of xegpu layouts.">
];
}

def XeGPUWgToSgDistribute : Pass<"xegpu-wg-to-sg-distribute"> {
Expand Down
2 changes: 2 additions & 0 deletions mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
Original file line number Diff line number Diff line change
Expand Up @@ -270,6 +270,8 @@ inline const uArch *getUArch(llvm::StringRef archName) {
return PVCuArch::getInstance();
else if (archName.equals_insensitive("bmg"))
return BMGuArch::getInstance();
else
llvm_unreachable("No matching uArch found");

return nullptr;
}
Expand Down
2 changes: 2 additions & 0 deletions mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,8 @@ namespace mlir {
namespace xegpu {
namespace uArch {

constexpr unsigned generalPackedFormatBitSize{32};

// An enum class to represent the scope of an instruction
enum class InstructionScope { Lane, Subgroup, Workgroup, Cluster };
enum class InstructionKind {
Expand Down
12 changes: 7 additions & 5 deletions mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@
#include "mlir/Dialect/Index/IR/IndexOps.h"
#include "mlir/Dialect/Utils/IndexingUtils.h"
#include "mlir/Dialect/XeGPU/IR/XeGPU.h"
#include "mlir/Dialect/XeGPU/IR/XeGPUTargetInfo.h"
#include "mlir/Dialect/XeGPU/Utils/XeGPUUtils.h"
#include "mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h"
#include "mlir/IR/Builders.h"
#include "mlir/IR/DialectImplementation.h"
Expand Down Expand Up @@ -229,8 +229,10 @@ LayoutAttr::verify(llvm::function_ref<mlir::InFlightDiagnostic()> emitError,
}

if (inst_data && lane_layout && inst_data.size() != lane_layout.size()) {
return emitError()
<< "expected inst_data and lane_layout to have the same rank";
return emitError() << "expected inst_data and lane_layout to have the same "
"rank, got inst_data "
<< inst_data.size() << ", lane_layout "
<< lane_layout.size();
}

// sg_data is optional for Workgroup layout, but its presence requires
Expand Down Expand Up @@ -569,8 +571,8 @@ TensorDescType::verify(llvm::function_ref<InFlightDiagnostic()> emitError,
// for gather and scatter ops, Low-precision types are packed in 32-bit units.
unsigned bitWidth = elementType.getIntOrFloatBitWidth();
int chunkAlignmentFactor =
bitWidth < targetinfo::packedSizeInBitsForGatherScatter
? targetinfo::packedSizeInBitsForGatherScatter / bitWidth
bitWidth < xegpu::uArch::generalPackedFormatBitSize
? xegpu::uArch::generalPackedFormatBitSize / bitWidth
: 1;
auto scatterAttr = mlir::dyn_cast_if_present<ScatterTensorDescAttr>(encoding);
if (scatterAttr) {
Expand Down
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