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[VectorCombine] Try to scalarize vector loads feeding bitcast instructions. #164682
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,32 @@ | ||
| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 | ||
| ; RUN: opt -O3 -mtriple=arm64-apple-darwinos -S %s | FileCheck %s | ||
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| define noundef i32 @load_ext_extract(ptr %src) { | ||
| ; CHECK-LABEL: define noundef range(i32 0, 1021) i32 @load_ext_extract( | ||
| ; CHECK-SAME: ptr readonly captures(none) [[SRC:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { | ||
| ; CHECK-NEXT: [[ENTRY:.*:]] | ||
| ; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[SRC]], align 4 | ||
| ; CHECK-NEXT: [[TMP15:%.*]] = lshr i32 [[TMP14]], 24 | ||
| ; CHECK-NEXT: [[TMP16:%.*]] = lshr i32 [[TMP14]], 16 | ||
| ; CHECK-NEXT: [[TMP17:%.*]] = and i32 [[TMP16]], 255 | ||
| ; CHECK-NEXT: [[TMP18:%.*]] = lshr i32 [[TMP14]], 8 | ||
| ; CHECK-NEXT: [[TMP19:%.*]] = and i32 [[TMP18]], 255 | ||
| ; CHECK-NEXT: [[TMP20:%.*]] = and i32 [[TMP14]], 255 | ||
| ; CHECK-NEXT: [[ADD1:%.*]] = add nuw nsw i32 [[TMP20]], [[TMP19]] | ||
| ; CHECK-NEXT: [[ADD2:%.*]] = add nuw nsw i32 [[ADD1]], [[TMP17]] | ||
| ; CHECK-NEXT: [[ADD3:%.*]] = add nuw nsw i32 [[ADD2]], [[TMP15]] | ||
| ; CHECK-NEXT: ret i32 [[ADD3]] | ||
| ; | ||
| entry: | ||
| %x = load <4 x i8>, ptr %src, align 4 | ||
| %ext = zext nneg <4 x i8> %x to <4 x i32> | ||
| %ext.0 = extractelement <4 x i32> %ext, i64 0 | ||
| %ext.1 = extractelement <4 x i32> %ext, i64 1 | ||
| %ext.2 = extractelement <4 x i32> %ext, i64 2 | ||
| %ext.3 = extractelement <4 x i32> %ext, i64 3 | ||
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| %add1 = add i32 %ext.0, %ext.1 | ||
| %add2 = add i32 %add1, %ext.2 | ||
| %add3 = add i32 %add2, %ext.3 | ||
| ret i32 %add3 | ||
| } |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,136 @@ | ||
| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 | ||
| ; RUN: opt -passes=vector-combine -mtriple=arm64-apple-darwinos -S %s | FileCheck %s | ||
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| define i32 @load_v4i8_bitcast_to_i32(ptr %x) { | ||
| ; CHECK-LABEL: define i32 @load_v4i8_bitcast_to_i32( | ||
| ; CHECK-SAME: ptr [[X:%.*]]) { | ||
| ; CHECK-NEXT: [[R_SCALAR:%.*]] = load i32, ptr [[X]], align 4 | ||
| ; CHECK-NEXT: ret i32 [[R_SCALAR]] | ||
| ; | ||
| %lv = load <4 x i8>, ptr %x | ||
| %r = bitcast <4 x i8> %lv to i32 | ||
| ret i32 %r | ||
| } | ||
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| define i64 @load_v2i32_bitcast_to_i64(ptr %x) { | ||
| ; CHECK-LABEL: define i64 @load_v2i32_bitcast_to_i64( | ||
| ; CHECK-SAME: ptr [[X:%.*]]) { | ||
| ; CHECK-NEXT: [[R_SCALAR:%.*]] = load i64, ptr [[X]], align 8 | ||
| ; CHECK-NEXT: ret i64 [[R_SCALAR]] | ||
| ; | ||
| %lv = load <2 x i32>, ptr %x | ||
| %r = bitcast <2 x i32> %lv to i64 | ||
| ret i64 %r | ||
| } | ||
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| define float @load_v4i8_bitcast_to_float(ptr %x) { | ||
| ; CHECK-LABEL: define float @load_v4i8_bitcast_to_float( | ||
| ; CHECK-SAME: ptr [[X:%.*]]) { | ||
| ; CHECK-NEXT: [[R_SCALAR:%.*]] = load float, ptr [[X]], align 4 | ||
| ; CHECK-NEXT: ret float [[R_SCALAR]] | ||
| ; | ||
| %lv = load <4 x i8>, ptr %x | ||
| %r = bitcast <4 x i8> %lv to float | ||
| ret float %r | ||
| } | ||
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| define float @load_v2i16_bitcast_to_float(ptr %x) { | ||
| ; CHECK-LABEL: define float @load_v2i16_bitcast_to_float( | ||
| ; CHECK-SAME: ptr [[X:%.*]]) { | ||
| ; CHECK-NEXT: [[R_SCALAR:%.*]] = load float, ptr [[X]], align 4 | ||
| ; CHECK-NEXT: ret float [[R_SCALAR]] | ||
| ; | ||
| %lv = load <2 x i16>, ptr %x | ||
| %r = bitcast <2 x i16> %lv to float | ||
| ret float %r | ||
| } | ||
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| define double @load_v4i16_bitcast_to_double(ptr %x) { | ||
| ; CHECK-LABEL: define double @load_v4i16_bitcast_to_double( | ||
| ; CHECK-SAME: ptr [[X:%.*]]) { | ||
| ; CHECK-NEXT: [[LV:%.*]] = load <4 x i16>, ptr [[X]], align 8 | ||
| ; CHECK-NEXT: [[R_SCALAR:%.*]] = bitcast <4 x i16> [[LV]] to double | ||
| ; CHECK-NEXT: ret double [[R_SCALAR]] | ||
| ; | ||
| %lv = load <4 x i16>, ptr %x | ||
| %r = bitcast <4 x i16> %lv to double | ||
| ret double %r | ||
| } | ||
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| define double @load_v2i32_bitcast_to_double(ptr %x) { | ||
| ; CHECK-LABEL: define double @load_v2i32_bitcast_to_double( | ||
| ; CHECK-SAME: ptr [[X:%.*]]) { | ||
| ; CHECK-NEXT: [[LV:%.*]] = load <2 x i32>, ptr [[X]], align 8 | ||
| ; CHECK-NEXT: [[R_SCALAR:%.*]] = bitcast <2 x i32> [[LV]] to double | ||
| ; CHECK-NEXT: ret double [[R_SCALAR]] | ||
| ; | ||
| %lv = load <2 x i32>, ptr %x | ||
| %r = bitcast <2 x i32> %lv to double | ||
| ret double %r | ||
| } | ||
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| ; Multiple users with the same bitcast type should be scalarized. | ||
| define i32 @load_v4i8_bitcast_multiple_users_same_type(ptr %x) { | ||
| ; CHECK-LABEL: define i32 @load_v4i8_bitcast_multiple_users_same_type( | ||
| ; CHECK-SAME: ptr [[X:%.*]]) { | ||
| ; CHECK-NEXT: [[LV_SCALAR:%.*]] = load i32, ptr [[X]], align 4 | ||
| ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV_SCALAR]], [[LV_SCALAR]] | ||
| ; CHECK-NEXT: ret i32 [[ADD]] | ||
| ; | ||
| %lv = load <4 x i8>, ptr %x | ||
| %r1 = bitcast <4 x i8> %lv to i32 | ||
| %r2 = bitcast <4 x i8> %lv to i32 | ||
| %add = add i32 %r1, %r2 | ||
| ret i32 %add | ||
| } | ||
|
Collaborator
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Aren't other passes likely to have already folded these duplication or are you seeing this kind of thing in real world code?
Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I think for larger the motivating cases this improves results in combination with extend scalarization. @juliannagele could you add a larger case showing the interaction?
Member
Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Yes, now that #164683 is in we can potentially scalarize a load-ext-extend sequence. Added a test that show this. |
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| ; Different bitcast types should not be scalarized. | ||
| define i32 @load_v4i8_bitcast_multiple_users_different_types(ptr %x) { | ||
| ; CHECK-LABEL: define i32 @load_v4i8_bitcast_multiple_users_different_types( | ||
| ; CHECK-SAME: ptr [[X:%.*]]) { | ||
| ; CHECK-NEXT: [[LV:%.*]] = load <4 x i8>, ptr [[X]], align 4 | ||
| ; CHECK-NEXT: [[R1:%.*]] = bitcast <4 x i8> [[LV]] to i32 | ||
| ; CHECK-NEXT: [[R2:%.*]] = bitcast <4 x i8> [[LV]] to float | ||
| ; CHECK-NEXT: [[R2_INT:%.*]] = bitcast float [[R2]] to i32 | ||
| ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[R1]], [[R2_INT]] | ||
| ; CHECK-NEXT: ret i32 [[ADD]] | ||
| ; | ||
| %lv = load <4 x i8>, ptr %x | ||
| %r1 = bitcast <4 x i8> %lv to i32 | ||
| %r2 = bitcast <4 x i8> %lv to float | ||
| %r2.int = bitcast float %r2 to i32 | ||
| %add = add i32 %r1, %r2.int | ||
| ret i32 %add | ||
| } | ||
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| ; Bitcast to vector should not be scalarized. | ||
| define <2 x i16> @load_v4i8_bitcast_to_vector(ptr %x) { | ||
| ; CHECK-LABEL: define <2 x i16> @load_v4i8_bitcast_to_vector( | ||
| ; CHECK-SAME: ptr [[X:%.*]]) { | ||
| ; CHECK-NEXT: [[LV:%.*]] = load <4 x i8>, ptr [[X]], align 4 | ||
| ; CHECK-NEXT: [[R:%.*]] = bitcast <4 x i8> [[LV]] to <2 x i16> | ||
| ; CHECK-NEXT: ret <2 x i16> [[R]] | ||
| ; | ||
| %lv = load <4 x i8>, ptr %x | ||
| %r = bitcast <4 x i8> %lv to <2 x i16> | ||
| ret <2 x i16> %r | ||
| } | ||
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| ; Load with both bitcast users and other users should not be scalarized. | ||
| define i32 @load_v4i8_mixed_users(ptr %x) { | ||
| ; CHECK-LABEL: define i32 @load_v4i8_mixed_users( | ||
| ; CHECK-SAME: ptr [[X:%.*]]) { | ||
| ; CHECK-NEXT: [[LV:%.*]] = load <4 x i8>, ptr [[X]], align 4 | ||
| ; CHECK-NEXT: [[R1:%.*]] = bitcast <4 x i8> [[LV]] to i32 | ||
| ; CHECK-NEXT: [[R2:%.*]] = extractelement <4 x i8> [[LV]], i32 0 | ||
| ; CHECK-NEXT: [[R2_EXT:%.*]] = zext i8 [[R2]] to i32 | ||
| ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[R1]], [[R2_EXT]] | ||
| ; CHECK-NEXT: ret i32 [[ADD]] | ||
| ; | ||
| %lv = load <4 x i8>, ptr %x | ||
| %r1 = bitcast <4 x i8> %lv to i32 | ||
| %r2 = extractelement <4 x i8> %lv, i32 0 | ||
| %r2.ext = zext i8 %r2 to i32 | ||
| %add = add i32 %r1, %r2.ext | ||
| ret i32 %add | ||
| } | ||
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done, thanks