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X86: Enable terminal rule #165957

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2 changes: 2 additions & 0 deletions llvm/lib/Target/X86/X86Subtarget.h
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Expand Up @@ -419,6 +419,8 @@ class X86Subtarget final : public X86GenSubtargetInfo {
/// Enable the MachineScheduler pass for all X86 subtargets.
bool enableMachineScheduler() const override { return true; }

bool enableTerminalRule() const override { return true; }

bool enableEarlyIfConversion() const override;

void getPostRAMutations(std::vector<std::unique_ptr<ScheduleDAGMutation>>
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48 changes: 24 additions & 24 deletions llvm/test/CodeGen/X86/3addr-16bit.ll
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Expand Up @@ -10,27 +10,27 @@ define zeroext i16 @test1(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
; X64-LABEL: test1:
; X64: ## %bb.0: ## %entry
; X64-NEXT: movl %esi, %eax
; X64-NEXT: incl %eax
; X64-NEXT: cmpw %di, %si
; X64-NEXT: incl %esi
; X64-NEXT: cmpw %di, %ax
; X64-NEXT: jne LBB0_2
; X64-NEXT: ## %bb.1: ## %bb
; X64-NEXT: pushq %rbx
; X64-NEXT: movzwl %ax, %ebx
; X64-NEXT: movzwl %si, %ebx
; X64-NEXT: movl %ebx, %edi
; X64-NEXT: callq _foo
; X64-NEXT: movl %ebx, %eax
; X64-NEXT: popq %rbx
; X64-NEXT: retq
; X64-NEXT: LBB0_2: ## %bb1
; X64-NEXT: movzwl %ax, %eax
; X64-NEXT: movzwl %si, %eax
; X64-NEXT: retq
;
; X86-LABEL: test1:
; X86: ## %bb.0: ## %entry
; X86-NEXT: pushl %esi
; X86-NEXT: subl $8, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: incl %eax
; X86-NEXT: cmpw {{[0-9]+}}(%esp), %cx
; X86-NEXT: jne LBB0_2
Expand Down Expand Up @@ -63,27 +63,27 @@ define zeroext i16 @test2(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
; X64-LABEL: test2:
; X64: ## %bb.0: ## %entry
; X64-NEXT: movl %esi, %eax
; X64-NEXT: decl %eax
; X64-NEXT: cmpw %di, %si
; X64-NEXT: decl %esi
; X64-NEXT: cmpw %di, %ax
; X64-NEXT: jne LBB1_2
; X64-NEXT: ## %bb.1: ## %bb
; X64-NEXT: pushq %rbx
; X64-NEXT: movzwl %ax, %ebx
; X64-NEXT: movzwl %si, %ebx
; X64-NEXT: movl %ebx, %edi
; X64-NEXT: callq _foo
; X64-NEXT: movl %ebx, %eax
; X64-NEXT: popq %rbx
; X64-NEXT: retq
; X64-NEXT: LBB1_2: ## %bb1
; X64-NEXT: movzwl %ax, %eax
; X64-NEXT: movzwl %si, %eax
; X64-NEXT: retq
;
; X86-LABEL: test2:
; X86: ## %bb.0: ## %entry
; X86-NEXT: pushl %esi
; X86-NEXT: subl $8, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: decl %eax
; X86-NEXT: cmpw {{[0-9]+}}(%esp), %cx
; X86-NEXT: jne LBB1_2
Expand Down Expand Up @@ -118,27 +118,27 @@ define zeroext i16 @test3(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
; X64-LABEL: test3:
; X64: ## %bb.0: ## %entry
; X64-NEXT: movl %esi, %eax
; X64-NEXT: addl $2, %eax
; X64-NEXT: cmpw %di, %si
; X64-NEXT: addl $2, %esi
; X64-NEXT: cmpw %di, %ax
; X64-NEXT: jne LBB2_2
; X64-NEXT: ## %bb.1: ## %bb
; X64-NEXT: pushq %rbx
; X64-NEXT: movzwl %ax, %ebx
; X64-NEXT: movzwl %si, %ebx
; X64-NEXT: movl %ebx, %edi
; X64-NEXT: callq _foo
; X64-NEXT: movl %ebx, %eax
; X64-NEXT: popq %rbx
; X64-NEXT: retq
; X64-NEXT: LBB2_2: ## %bb1
; X64-NEXT: movzwl %ax, %eax
; X64-NEXT: movzwl %si, %eax
; X64-NEXT: retq
;
; X86-LABEL: test3:
; X86: ## %bb.0: ## %entry
; X86-NEXT: pushl %esi
; X86-NEXT: subl $8, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: addl $2, %eax
; X86-NEXT: cmpw {{[0-9]+}}(%esp), %cx
; X86-NEXT: jne LBB2_2
Expand Down Expand Up @@ -171,28 +171,28 @@ define zeroext i16 @test4(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
; X64-LABEL: test4:
; X64: ## %bb.0: ## %entry
; X64-NEXT: movl %esi, %eax
; X64-NEXT: addl %edi, %eax
; X64-NEXT: cmpw %di, %si
; X64-NEXT: addl %edi, %esi
; X64-NEXT: cmpw %di, %ax
; X64-NEXT: jne LBB3_2
; X64-NEXT: ## %bb.1: ## %bb
; X64-NEXT: pushq %rbx
; X64-NEXT: movzwl %ax, %ebx
; X64-NEXT: movzwl %si, %ebx
; X64-NEXT: movl %ebx, %edi
; X64-NEXT: callq _foo
; X64-NEXT: movl %ebx, %eax
; X64-NEXT: popq %rbx
; X64-NEXT: retq
; X64-NEXT: LBB3_2: ## %bb1
; X64-NEXT: movzwl %ax, %eax
; X64-NEXT: movzwl %si, %eax
; X64-NEXT: retq
;
; X86-LABEL: test4:
; X86: ## %bb.0: ## %entry
; X86-NEXT: pushl %esi
; X86-NEXT: subl $8, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl %edx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %edx
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: cmpw %cx, %dx
; X86-NEXT: jne LBB3_2
Expand Down
22 changes: 13 additions & 9 deletions llvm/test/CodeGen/X86/atomic-rm-bit-test.ll
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Expand Up @@ -2156,28 +2156,30 @@ define zeroext i16 @atomic_shl1_mask01_xor_16_gpr_brz(ptr %v, i16 zeroext %c) no
; X64-LABEL: atomic_shl1_mask01_xor_16_gpr_brz:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
; X64-NEXT: movl %ecx, %edx
; X64-NEXT: andb $15, %cl
; X64-NEXT: movl $1, %edx
; X64-NEXT: shll %cl, %edx
; X64-NEXT: movl $1, %esi
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-NEXT: shll %cl, %esi
; X64-NEXT: movzwl (%rdi), %eax
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB34_1: # %atomicrmw.start
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: xorl %edx, %ecx
; X64-NEXT: xorl %esi, %ecx
; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: lock cmpxchgw %cx, (%rdi)
; X64-NEXT: # kill: def $ax killed $ax def $eax
; X64-NEXT: jne .LBB34_1
; X64-NEXT: # %bb.2: # %atomicrmw.end
; X64-NEXT: movzwl %ax, %ecx
; X64-NEXT: movw $123, %ax
; X64-NEXT: testl %ecx, %edx
; X64-NEXT: testl %ecx, %esi
; X64-NEXT: je .LBB34_3
; X64-NEXT: # %bb.4: # %return
; X64-NEXT: retq
; X64-NEXT: .LBB34_3: # %if.then
; X64-NEXT: movzwl %si, %eax
; X64-NEXT: movzwl %dx, %eax
; X64-NEXT: movzwl (%rdi,%rax,2), %eax
; X64-NEXT: retq
entry:
Expand Down Expand Up @@ -3398,10 +3400,12 @@ define zeroext i16 @atomic_shl1_mask01_and_16_gpr_brnz(ptr %v, i16 zeroext %c) n
; X64-LABEL: atomic_shl1_mask01_and_16_gpr_brnz:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
; X64-NEXT: movl %ecx, %edx
; X64-NEXT: andb $15, %cl
; X64-NEXT: movl $1, %edx
; X64-NEXT: shll %cl, %edx
; X64-NEXT: movl $1, %esi
; X64-NEXT: shll %cl, %esi
; X64-NEXT: movl $-2, %r8d
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-NEXT: roll %cl, %r8d
; X64-NEXT: movzwl (%rdi), %eax
; X64-NEXT: .p2align 4
Expand All @@ -3415,10 +3419,10 @@ define zeroext i16 @atomic_shl1_mask01_and_16_gpr_brnz(ptr %v, i16 zeroext %c) n
; X64-NEXT: jne .LBB52_1
; X64-NEXT: # %bb.2: # %atomicrmw.end
; X64-NEXT: movzwl %ax, %eax
; X64-NEXT: testl %eax, %edx
; X64-NEXT: testl %eax, %esi
; X64-NEXT: je .LBB52_3
; X64-NEXT: # %bb.4: # %if.then
; X64-NEXT: movzwl %si, %eax
; X64-NEXT: movzwl %dx, %eax
; X64-NEXT: movzwl (%rdi,%rax,2), %eax
; X64-NEXT: retq
; X64-NEXT: .LBB52_3:
Expand Down
3 changes: 2 additions & 1 deletion llvm/test/CodeGen/X86/atomicrmw-fadd-fp-vector.ll
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Expand Up @@ -46,8 +46,9 @@ define <2 x half> @test_atomicrmw_fadd_v2f16_align4(ptr addrspace(1) %ptr, <2 x
; CHECK-NEXT: orl %edx, %eax
; CHECK-NEXT: lock cmpxchgl %ecx, (%rbx)
; CHECK-NEXT: setne %cl
; CHECK-NEXT: pinsrw $0, %eax, %xmm0
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: shrl $16, %eax
; CHECK-NEXT: pinsrw $0, %edx, %xmm0
; CHECK-NEXT: pinsrw $0, %eax, %xmm1
; CHECK-NEXT: testb %cl, %cl
; CHECK-NEXT: jne .LBB0_1
Expand Down
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/X86/bitcast-vector-bool.ll
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Expand Up @@ -216,17 +216,17 @@ define i1 @trunc_v8i16_cmp(<8 x i16> %a0) nounwind {
define i8 @bitcast_v16i8_to_v2i8(<16 x i8> %a0) nounwind {
; SSE-LABEL: bitcast_v16i8_to_v2i8:
; SSE: # %bb.0:
; SSE-NEXT: pmovmskb %xmm0, %ecx
; SSE-NEXT: movl %ecx, %eax
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: movl %eax, %ecx
; SSE-NEXT: shrl $8, %eax
; SSE-NEXT: addb %cl, %al
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq
;
; AVX12-LABEL: bitcast_v16i8_to_v2i8:
; AVX12: # %bb.0:
; AVX12-NEXT: vpmovmskb %xmm0, %ecx
; AVX12-NEXT: movl %ecx, %eax
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: movl %eax, %ecx
; AVX12-NEXT: shrl $8, %eax
; AVX12-NEXT: addb %cl, %al
; AVX12-NEXT: # kill: def $al killed $al killed $eax
Expand Down Expand Up @@ -441,8 +441,8 @@ define i8 @bitcast_v16i16_to_v2i8(<16 x i16> %a0) nounwind {
; SSE-LABEL: bitcast_v16i16_to_v2i8:
; SSE: # %bb.0:
; SSE-NEXT: packsswb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %ecx
; SSE-NEXT: movl %ecx, %eax
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: movl %eax, %ecx
; SSE-NEXT: shrl $8, %eax
; SSE-NEXT: addb %cl, %al
; SSE-NEXT: # kill: def $al killed $al killed $eax
Expand All @@ -452,8 +452,8 @@ define i8 @bitcast_v16i16_to_v2i8(<16 x i16> %a0) nounwind {
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: movl %ecx, %eax
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: movl %eax, %ecx
; AVX1-NEXT: shrl $8, %eax
; AVX1-NEXT: addb %cl, %al
; AVX1-NEXT: # kill: def $al killed $al killed $eax
Expand All @@ -464,8 +464,8 @@ define i8 @bitcast_v16i16_to_v2i8(<16 x i16> %a0) nounwind {
; AVX2: # %bb.0:
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpmovmskb %xmm0, %ecx
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: movl %eax, %ecx
; AVX2-NEXT: shrl $8, %eax
; AVX2-NEXT: addb %cl, %al
; AVX2-NEXT: # kill: def $al killed $al killed $eax
Expand Down Expand Up @@ -762,8 +762,8 @@ define i8 @bitcast_v16i32_to_v2i8(<16 x i32> %a0) nounwind {
; SSE-NEXT: packssdw %xmm3, %xmm2
; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: packsswb %xmm2, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %ecx
; SSE-NEXT: movl %ecx, %eax
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: movl %eax, %ecx
; SSE-NEXT: shrl $8, %eax
; SSE-NEXT: addb %cl, %al
; SSE-NEXT: # kill: def $al killed $al killed $eax
Expand All @@ -776,8 +776,8 @@ define i8 @bitcast_v16i32_to_v2i8(<16 x i32> %a0) nounwind {
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: movl %ecx, %eax
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: movl %eax, %ecx
; AVX1-NEXT: shrl $8, %eax
; AVX1-NEXT: addb %cl, %al
; AVX1-NEXT: # kill: def $al killed $al killed $eax
Expand All @@ -793,8 +793,8 @@ define i8 @bitcast_v16i32_to_v2i8(<16 x i32> %a0) nounwind {
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
; AVX2-NEXT: vpmovmskb %xmm0, %ecx
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: movl %eax, %ecx
; AVX2-NEXT: shrl $8, %eax
; AVX2-NEXT: addb %cl, %al
; AVX2-NEXT: # kill: def $al killed $al killed $eax
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/coalescer-dead-flag-verifier-error.ll
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Expand Up @@ -7,8 +7,8 @@
define void @_ZNK4llvm5APInt21multiplicativeInverseERKS0_(ptr %r) {
; CHECK-LABEL: _ZNK4llvm5APInt21multiplicativeInverseERKS0_:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: jmp .LBB0_1
; CHECK-NEXT: .p2align 4
Expand Down Expand Up @@ -68,8 +68,8 @@ _ZNK4llvm5APInt13getActiveBitsEv.exit.i.i: ; preds = %for.body.i.i.i.i.i
define void @_ZNK4llvm5APInt21multiplicativeInverseERKS0__assert(ptr %r) {
; CHECK-LABEL: _ZNK4llvm5APInt21multiplicativeInverseERKS0__assert:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: jmp .LBB1_1
; CHECK-NEXT: .p2align 4
Expand Down
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