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[SPIR-V] Enable structurizer for kernel environment #166079
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,80 @@ | ||
| ; RUN: llc -mtriple=spirv64-unknown-opencl -O0 %s -o - | FileCheck %s | ||
| ; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-opencl %s -o - -filetype=obj | spirv-val %} | ||
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| ; This test verifies that the structurizer pass runs for OpenCL kernels, | ||
| ; generating structured control flow with OpLoopMerge instructions and | ||
| ; translating loop metadata to appropriate LoopControl operands. | ||
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| ; CHECK: OpEntryPoint Kernel %[[#kernel_unroll:]] "test_kernel_unroll" | ||
| ; CHECK: OpEntryPoint Kernel %[[#kernel_dontunroll:]] "test_kernel_dontunroll" | ||
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| ; Verify unroll metadata is translated to Unroll LoopControl | ||
| ; CHECK: %[[#kernel_unroll]] = OpFunction | ||
| ; CHECK: OpLabel | ||
| ; CHECK: OpLoopMerge %[[#]] %[[#]] Unroll | ||
| ; CHECK: OpFunctionEnd | ||
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| ; Verify dont_unroll metadata is translated to DontUnroll LoopControl | ||
| ; CHECK: %[[#kernel_dontunroll]] = OpFunction | ||
| ; CHECK: OpLabel | ||
| ; CHECK: OpLoopMerge %[[#]] %[[#]] DontUnroll | ||
| ; CHECK: OpFunctionEnd | ||
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| define spir_kernel void @test_kernel_unroll(ptr addrspace(1) %out) { | ||
| entry: | ||
| %i = alloca i32, align 4 | ||
| store i32 0, ptr %i, align 4 | ||
| br label %for.cond | ||
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| for.cond: | ||
| %0 = load i32, ptr %i, align 4 | ||
| %cmp = icmp slt i32 %0, 10 | ||
| br i1 %cmp, label %for.body, label %for.end | ||
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| for.body: | ||
| %1 = load i32, ptr %i, align 4 | ||
| %arrayidx = getelementptr inbounds i32, ptr addrspace(1) %out, i64 0 | ||
| store i32 %1, ptr addrspace(1) %arrayidx, align 4 | ||
| br label %for.inc | ||
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| for.inc: | ||
| %2 = load i32, ptr %i, align 4 | ||
| %inc = add nsw i32 %2, 1 | ||
| store i32 %inc, ptr %i, align 4 | ||
| br label %for.cond, !llvm.loop !0 | ||
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| for.end: | ||
| ret void | ||
| } | ||
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| define spir_kernel void @test_kernel_dontunroll(ptr addrspace(1) %out) { | ||
| entry: | ||
| %i = alloca i32, align 4 | ||
| store i32 0, ptr %i, align 4 | ||
| br label %for.cond | ||
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| for.cond: | ||
| %0 = load i32, ptr %i, align 4 | ||
| %cmp = icmp slt i32 %0, 10 | ||
| br i1 %cmp, label %for.body, label %for.end | ||
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| for.body: | ||
| %1 = load i32, ptr %i, align 4 | ||
| %arrayidx = getelementptr inbounds i32, ptr addrspace(1) %out, i64 0 | ||
| store i32 %1, ptr addrspace(1) %arrayidx, align 4 | ||
| br label %for.inc | ||
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| for.inc: | ||
| %2 = load i32, ptr %i, align 4 | ||
| %inc = add nsw i32 %2, 1 | ||
| store i32 %inc, ptr %i, align 4 | ||
| br label %for.cond, !llvm.loop !2 | ||
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| for.end: | ||
| ret void | ||
| } | ||
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| !0 = distinct !{!0, !1} | ||
| !1 = !{!"llvm.loop.unroll.full"} | ||
| !2 = distinct !{!2, !3} | ||
| !3 = !{!"llvm.loop.unroll.disable"} |
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Is there another valid target? Should the condition be removed instead?
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Indeed, will remove
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Or actually, given there is the following PR, let me summon @AlexVlx to answer if it can break something on their end (TargetTriple.getVendor() == Triple::AMD falls under IsKernel, but still).
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Hmm, this does indeed cause issues, I think. We don't / cannot run passes over SPIR-V, asides from those that are absolutely necessary for successful lowering / obtaining valid SPIR-V (see #154765 for a bit more on this). We use
-disable-llvm-optzns, but it'd not work here. Would it be at all possible to guard against enabling these for AMDGCNSPIRV? I.e. have the current check be replaced for a check on the vendor?There was a problem hiding this comment.
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Let me move it to draft actually. May be just implementing https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_unstructured_loop_controls.asciidoc is the right direction. I haven't though about it for some reasons before Nathan's comment.
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Cheers, apologies for the inconvenience.