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5 changes: 1 addition & 4 deletions llvm/lib/Target/AArch64/AArch64FastISel.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -81,10 +81,7 @@ namespace {
class AArch64FastISel final : public FastISel {
class Address {
public:
using BaseKind = enum {
RegBase,
FrameIndexBase
};
enum BaseKind { RegBase, FrameIndexBase };

private:
BaseKind Kind = RegBase;
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2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -435,7 +435,7 @@ void GCNHazardRecognizer::RecedeCycle() {
// Helper Functions
//===----------------------------------------------------------------------===//

using HazardFnResult = enum { HazardFound, HazardExpired, NoHazardFound };
enum HazardFnResult { HazardFound, HazardExpired, NoHazardFound };

using IsExpiredFn = function_ref<bool(const MachineInstr &, int WaitStates)>;
using GetNumWaitStatesFn = function_ref<unsigned int(const MachineInstr &)>;
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2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ class GCNNSAReassignImpl {
bool run(MachineFunction &MF);

private:
using NSA_Status = enum {
enum NSA_Status {
NOT_NSA, // Not an NSA instruction
FIXED, // NSA which we cannot modify
NON_CONTIGUOUS, // NSA with non-sequential address which we can try
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2 changes: 1 addition & 1 deletion llvm/lib/Target/ARM/ARMFastISel.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -86,7 +86,7 @@ namespace {
// All possible address modes, plus some.
class Address {
public:
using BaseKind = enum { RegBase, FrameIndexBase };
enum BaseKind { RegBase, FrameIndexBase };

private:
BaseKind Kind = RegBase;
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2 changes: 1 addition & 1 deletion llvm/lib/Target/Mips/MipsFastISel.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -82,7 +82,7 @@ class MipsFastISel final : public FastISel {
// All possible address modes.
class Address {
public:
using BaseKind = enum { RegBase, FrameIndexBase };
enum BaseKind { RegBase, FrameIndexBase };

private:
BaseKind Kind = RegBase;
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2 changes: 1 addition & 1 deletion llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ class WebAssemblyFastISel final : public FastISel {
// All possible address modes.
class Address {
public:
using BaseKind = enum { RegBase, FrameIndexBase };
enum BaseKind { RegBase, FrameIndexBase };

private:
BaseKind Kind = RegBase;
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2 changes: 1 addition & 1 deletion llvm/lib/Target/X86/X86VZeroUpper.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,7 @@ namespace {
MachineBasicBlock &MBB);
void addDirtySuccessor(MachineBasicBlock &MBB);

using BlockExitState = enum { PASS_THROUGH, EXITS_CLEAN, EXITS_DIRTY };
enum BlockExitState { PASS_THROUGH, EXITS_CLEAN, EXITS_DIRTY };

static const char* getBlockExitStateName(BlockExitState ST);

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4 changes: 2 additions & 2 deletions llvm/unittests/ADT/FallibleIteratorTest.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -19,8 +19,8 @@ using namespace llvm;

namespace {

using ItemValid = enum { ValidItem, InvalidItem };
using LinkValid = enum { ValidLink, InvalidLink };
enum ItemValid { ValidItem, InvalidItem };
enum LinkValid { ValidLink, InvalidLink };

class Item {
public:
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