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RuntimeLibcalls: Add call entries for sincos sleef and armpl libcalls #166983

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Merged
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Nov 10, 2025
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RuntimeLibcalls: Add call entries for sincos sleef and armpl libcalls #166983

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13 changes: 13 additions & 0 deletions llvm/include/llvm/IR/RuntimeLibcalls.td
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Original file line number Diff line number Diff line change
Expand Up @@ -183,6 +183,7 @@ foreach FPTy = ["F32", "F64", "F80", "F128", "PPCF128"] in {
}

foreach VecTy = ["V4F32", "V2F64", "NXV4F32", "NXV2F64"] in {
def SINCOS_#VecTy : RuntimeLibcall;
def SINCOSPI_#VecTy : RuntimeLibcall;
}

Expand Down Expand Up @@ -1092,6 +1093,11 @@ def __security_check_cookie_arm64ec : RuntimeLibcallImpl<SECURITY_CHECK_COOKIE,
//===----------------------------------------------------------------------===//

defset list<RuntimeLibcallImpl> SleefLibcalls = {
def _ZGVnN2vl8l8_sincos : RuntimeLibcallImpl<SINCOS_V2F64>;
def _ZGVnN4vl4l4_sincosf : RuntimeLibcallImpl<SINCOS_V4F32>;
def _ZGVsNxvl8l8_sincos : RuntimeLibcallImpl<SINCOS_NXV2F64>;
def _ZGVsNxvl4l4_sincosf : RuntimeLibcallImpl<SINCOS_NXV4F32>;

def _ZGVnN4vl4l4_sincospif : RuntimeLibcallImpl<SINCOSPI_V4F32>;
def _ZGVnN2vl8l8_sincospi : RuntimeLibcallImpl<SINCOSPI_V2F64>;
def _ZGVsNxvl4l4_sincospif : RuntimeLibcallImpl<SINCOSPI_NXV4F32>;
Expand All @@ -1103,6 +1109,13 @@ defset list<RuntimeLibcallImpl> SleefLibcalls = {
//===----------------------------------------------------------------------===//

defset list<RuntimeLibcallImpl> ARMPLLibcalls = {
def armpl_vsincosq_f64
: RuntimeLibcallImpl<SINCOS_V2F64>; // CallingConv::AArch64_VectorCall
def armpl_vsincosq_f32
: RuntimeLibcallImpl<SINCOS_V4F32>; // CallingConv::AArch64_VectorCall
def armpl_svsincos_f64_x : RuntimeLibcallImpl<SINCOS_NXV2F64>;
def armpl_svsincos_f32_x : RuntimeLibcallImpl<SINCOS_NXV4F32>;

def armpl_vsincospiq_f32 : RuntimeLibcallImpl<SINCOSPI_V4F32>;
def armpl_vsincospiq_f64 : RuntimeLibcallImpl<SINCOSPI_V2F64>;
def armpl_svsincospi_f32_x : RuntimeLibcallImpl<SINCOSPI_NXV4F32>;
Expand Down
36 changes: 32 additions & 4 deletions llvm/lib/IR/RuntimeLibcalls.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -43,17 +43,26 @@ RuntimeLibcallsInfo::RuntimeLibcallsInfo(const Triple &TT,
switch (ClVectorLibrary) {
case VectorLibrary::SLEEFGNUABI:
for (RTLIB::LibcallImpl Impl :
{RTLIB::impl__ZGVnN4vl4l4_sincospif, RTLIB::impl__ZGVnN2vl8l8_sincospi,
{RTLIB::impl__ZGVnN2vl8l8_sincos, RTLIB::impl__ZGVnN4vl4l4_sincosf,
RTLIB::impl__ZGVsNxvl8l8_sincos, RTLIB::impl__ZGVsNxvl4l4_sincosf,
RTLIB::impl__ZGVnN4vl4l4_sincospif, RTLIB::impl__ZGVnN2vl8l8_sincospi,
RTLIB::impl__ZGVsNxvl4l4_sincospif,
RTLIB::impl__ZGVsNxvl8l8_sincospi})
setAvailable(Impl);
break;
case VectorLibrary::ArmPL:
for (RTLIB::LibcallImpl Impl :
{RTLIB::impl_armpl_vsincospiq_f32, RTLIB::impl_armpl_vsincospiq_f64,
{RTLIB::impl_armpl_vsincosq_f64, RTLIB::impl_armpl_vsincosq_f32,
RTLIB::impl_armpl_svsincos_f64_x, RTLIB::impl_armpl_svsincos_f32_x,
RTLIB::impl_armpl_vsincospiq_f32, RTLIB::impl_armpl_vsincospiq_f64,
RTLIB::impl_armpl_svsincospi_f32_x,
RTLIB::impl_armpl_svsincospi_f64_x})
setAvailable(Impl);

for (RTLIB::LibcallImpl Impl :
{RTLIB::impl_armpl_vsincosq_f64, RTLIB::impl_armpl_vsincosq_f32})
setLibcallImplCallingConv(Impl, CallingConv::AArch64_VectorCall);

break;
default:
break;
Expand Down Expand Up @@ -188,6 +197,14 @@ RuntimeLibcallsInfo::getFunctionTy(LLVMContext &Ctx, const Triple &TT,
fcNegNormal));
return {FuncTy, Attrs};
}
case RTLIB::impl__ZGVnN2vl8l8_sincos:
case RTLIB::impl__ZGVnN4vl4l4_sincosf:
case RTLIB::impl__ZGVsNxvl8l8_sincos:
case RTLIB::impl__ZGVsNxvl4l4_sincosf:
case RTLIB::impl_armpl_vsincosq_f64:
case RTLIB::impl_armpl_vsincosq_f32:
case RTLIB::impl_armpl_svsincos_f64_x:
case RTLIB::impl_armpl_svsincos_f32_x:
case RTLIB::impl__ZGVnN4vl4l4_sincospif:
case RTLIB::impl__ZGVnN2vl8l8_sincospi:
case RTLIB::impl__ZGVsNxvl4l4_sincospif:
Expand All @@ -201,11 +218,20 @@ RuntimeLibcallsInfo::getFunctionTy(LLVMContext &Ctx, const Triple &TT,
bool IsF32 = LibcallImpl == RTLIB::impl__ZGVnN4vl4l4_sincospif ||
LibcallImpl == RTLIB::impl__ZGVsNxvl4l4_sincospif ||
LibcallImpl == RTLIB::impl_armpl_vsincospiq_f32 ||
LibcallImpl == RTLIB::impl_armpl_svsincospi_f32_x;
LibcallImpl == RTLIB::impl_armpl_svsincospi_f32_x ||
LibcallImpl == RTLIB::impl__ZGVnN4vl4l4_sincosf ||
LibcallImpl == RTLIB::impl__ZGVsNxvl4l4_sincosf ||
LibcallImpl == RTLIB::impl_armpl_vsincosq_f32 ||
LibcallImpl == RTLIB::impl_armpl_svsincos_f32_x;

Type *ScalarTy = IsF32 ? Type::getFloatTy(Ctx) : Type::getDoubleTy(Ctx);
unsigned EC = IsF32 ? 4 : 2;

bool IsScalable = LibcallImpl == RTLIB::impl__ZGVsNxvl4l4_sincospif ||
bool IsScalable = LibcallImpl == RTLIB::impl__ZGVsNxvl8l8_sincos ||
LibcallImpl == RTLIB::impl__ZGVsNxvl4l4_sincosf ||
LibcallImpl == RTLIB::impl_armpl_svsincos_f32_x ||
LibcallImpl == RTLIB::impl_armpl_svsincos_f64_x ||
LibcallImpl == RTLIB::impl__ZGVsNxvl4l4_sincospif ||
LibcallImpl == RTLIB::impl__ZGVsNxvl8l8_sincospi ||
LibcallImpl == RTLIB::impl_armpl_svsincospi_f32_x ||
LibcallImpl == RTLIB::impl_armpl_svsincospi_f64_x;
Expand Down Expand Up @@ -245,6 +271,8 @@ bool RuntimeLibcallsInfo::hasVectorMaskArgument(RTLIB::LibcallImpl Impl) {
/// FIXME: This should be generated by tablegen and support the argument at an
/// arbitrary position
switch (Impl) {
case RTLIB::impl_armpl_svsincos_f32_x:
case RTLIB::impl_armpl_svsincos_f64_x:
case RTLIB::impl_armpl_svsincospi_f32_x:
case RTLIB::impl_armpl_svsincospi_f64_x:
return true;
Expand Down
13 changes: 11 additions & 2 deletions llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
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Original file line number Diff line number Diff line change
@@ -1,12 +1,21 @@
; REQUIRES: aarch64-registered-target
; RUN: opt -S -passes=declare-runtime-libcalls -mtriple=aarch64-unknown-linux -mattr=+neon,+sve -vector-library=ArmPL < %s | FileCheck %s

; CHECK: declare void @armpl_svsincospi_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS:#[0-9]+]]
; CHECK: declare void @armpl_svsincos_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS:#[0-9]+]]

; CHECK: declare void @armpl_svsincospi_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS:#[0-9]+]]
; CHECK: declare void @armpl_svsincos_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS]]

; CHECK: declare void @armpl_svsincospi_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS]]

; CHECK: declare void @armpl_svsincospi_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS]]

; CHECK: declare void @armpl_vsincospiq_f32(<4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @armpl_vsincospiq_f64(<2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare aarch64_vector_pcs void @armpl_vsincosq_f32(<4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare aarch64_vector_pcs void @armpl_vsincosq_f64(<2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]


; CHECK: attributes [[ATTRS]] = { nocallback nofree nosync nounwind willreturn memory(argmem: write) }
14 changes: 11 additions & 3 deletions llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sleef.ll
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Original file line number Diff line number Diff line change
@@ -1,12 +1,20 @@
; REQUIRES: aarch64-registered-target
; RUN: opt -S -passes=declare-runtime-libcalls -mtriple=aarch64-unknown-linux -mattr=+neon,+sve -vector-library=sleefgnuabi < %s | FileCheck %s

; CHECK: declare void @_ZGVnN2vl8l8_sincospi(<2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS:#[0-9]+]]
; CHECK: declare void @_ZGVnN2vl8l8_sincos(<2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS:#[0-9]+]]

; CHECK: declare void @_ZGVnN2vl8l8_sincospi(<2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVnN4vl4l4_sincosf(<4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVnN4vl4l4_sincospif(<4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVsNxvl4l4_sincospif(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS:#[0-9]+]]
; CHECK: declare void @_ZGVsNxvl4l4_sincosf(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVsNxvl4l4_sincospif(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVsNxvl8l8_sincos(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVsNxvl8l8_sincospi(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS:#[0-9]+]]
; CHECK: declare void @_ZGVsNxvl8l8_sincospi(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: attributes [[ATTRS]] = { nocallback nofree nosync nounwind willreturn memory(argmem: write) }
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