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RuntimeLibcalls: Add libcall entries for sleef and armpl modf functions #166985

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Merged
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Nov 12, 2025
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RuntimeLibcalls: Add libcall entries for sleef and armpl modf functions #166985

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468c050
RuntimeLibcalls: Add libcall entries for sleef and armpl modf functions
arsenm Nov 7, 2025
61a9e50
Always check hasVectorMaskArgument
arsenm Nov 12, 2025
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11 changes: 11 additions & 0 deletions llvm/include/llvm/IR/RuntimeLibcalls.td
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Original file line number Diff line number Diff line change
Expand Up @@ -183,6 +183,7 @@ foreach FPTy = ["F32", "F64", "F80", "F128", "PPCF128"] in {
}

foreach VecTy = ["V4F32", "V2F64", "NXV4F32", "NXV2F64"] in {
def MODF_#VecTy : RuntimeLibcall;
def SINCOS_#VecTy : RuntimeLibcall;
def SINCOSPI_#VecTy : RuntimeLibcall;
}
Expand Down Expand Up @@ -1093,6 +1094,11 @@ def __security_check_cookie_arm64ec : RuntimeLibcallImpl<SECURITY_CHECK_COOKIE,
//===----------------------------------------------------------------------===//

defset list<RuntimeLibcallImpl> SleefLibcalls = {
def _ZGVnN2vl8_modf : RuntimeLibcallImpl<MODF_V2F64>;
def _ZGVnN4vl4_modff : RuntimeLibcallImpl<MODF_V4F32>;
def _ZGVsNxvl8_modf : RuntimeLibcallImpl<MODF_NXV2F64>;
def _ZGVsNxvl4_modff : RuntimeLibcallImpl<MODF_NXV4F32>;

def _ZGVnN2vl8l8_sincos : RuntimeLibcallImpl<SINCOS_V2F64>;
def _ZGVnN4vl4l4_sincosf : RuntimeLibcallImpl<SINCOS_V4F32>;
def _ZGVsNxvl8l8_sincos : RuntimeLibcallImpl<SINCOS_NXV2F64>;
Expand All @@ -1109,6 +1115,11 @@ defset list<RuntimeLibcallImpl> SleefLibcalls = {
//===----------------------------------------------------------------------===//

defset list<RuntimeLibcallImpl> ARMPLLibcalls = {
def armpl_vmodfq_f64 : RuntimeLibcallImpl<MODF_V2F64>; // CallingConv::AArch64_VectorCall
def armpl_vmodfq_f32 : RuntimeLibcallImpl<MODF_V4F32>; // CallingConv::AArch64_VectorCall
def armpl_svmodf_f64_x : RuntimeLibcallImpl<MODF_NXV2F64>;
def armpl_svmodf_f32_x : RuntimeLibcallImpl<MODF_NXV4F32>;

def armpl_vsincosq_f64
: RuntimeLibcallImpl<SINCOS_V2F64>; // CallingConv::AArch64_VectorCall
def armpl_vsincosq_f32
Expand Down
56 changes: 54 additions & 2 deletions llvm/lib/IR/RuntimeLibcalls.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,9 @@ RuntimeLibcallsInfo::RuntimeLibcallsInfo(const Triple &TT,
switch (ClVectorLibrary) {
case VectorLibrary::SLEEFGNUABI:
for (RTLIB::LibcallImpl Impl :
{RTLIB::impl__ZGVnN2vl8l8_sincos, RTLIB::impl__ZGVnN4vl4l4_sincosf,
{RTLIB::impl__ZGVnN2vl8_modf, RTLIB::impl__ZGVnN4vl4_modff,
RTLIB::impl__ZGVsNxvl8_modf, RTLIB::impl__ZGVsNxvl4_modff,
RTLIB::impl__ZGVnN2vl8l8_sincos, RTLIB::impl__ZGVnN4vl4l4_sincosf,
RTLIB::impl__ZGVsNxvl8l8_sincos, RTLIB::impl__ZGVsNxvl4l4_sincosf,
RTLIB::impl__ZGVnN4vl4l4_sincospif, RTLIB::impl__ZGVnN2vl8l8_sincospi,
RTLIB::impl__ZGVsNxvl4l4_sincospif,
Expand All @@ -52,7 +54,9 @@ RuntimeLibcallsInfo::RuntimeLibcallsInfo(const Triple &TT,
break;
case VectorLibrary::ArmPL:
for (RTLIB::LibcallImpl Impl :
{RTLIB::impl_armpl_vsincosq_f64, RTLIB::impl_armpl_vsincosq_f32,
{RTLIB::impl_armpl_vmodfq_f64, RTLIB::impl_armpl_vmodfq_f32,
RTLIB::impl_armpl_svmodf_f64_x, RTLIB::impl_armpl_svmodf_f32_x,
RTLIB::impl_armpl_vsincosq_f64, RTLIB::impl_armpl_vsincosq_f32,
RTLIB::impl_armpl_svsincos_f64_x, RTLIB::impl_armpl_svsincos_f32_x,
RTLIB::impl_armpl_vsincospiq_f32, RTLIB::impl_armpl_vsincospiq_f64,
RTLIB::impl_armpl_svsincospi_f32_x,
Expand Down Expand Up @@ -197,6 +201,52 @@ RuntimeLibcallsInfo::getFunctionTy(LLVMContext &Ctx, const Triple &TT,
fcNegNormal));
return {FuncTy, Attrs};
}
case RTLIB::impl__ZGVnN2vl8_modf:
case RTLIB::impl__ZGVnN4vl4_modff:
case RTLIB::impl__ZGVsNxvl8_modf:
case RTLIB::impl__ZGVsNxvl4_modff:
case RTLIB::impl_armpl_vmodfq_f64:
case RTLIB::impl_armpl_vmodfq_f32:
case RTLIB::impl_armpl_svmodf_f64_x:
case RTLIB::impl_armpl_svmodf_f32_x: {
AttrBuilder FuncAttrBuilder(Ctx);

bool IsF32 = LibcallImpl == RTLIB::impl__ZGVnN4vl4_modff ||
LibcallImpl == RTLIB::impl__ZGVsNxvl4_modff ||
LibcallImpl == RTLIB::impl_armpl_vmodfq_f32 ||
LibcallImpl == RTLIB::impl_armpl_svmodf_f32_x;

bool IsScalable = LibcallImpl == RTLIB::impl__ZGVsNxvl8_modf ||
LibcallImpl == RTLIB::impl__ZGVsNxvl4_modff ||
LibcallImpl == RTLIB::impl_armpl_svmodf_f64_x ||
LibcallImpl == RTLIB::impl_armpl_svmodf_f32_x;

Type *ScalarTy = IsF32 ? Type::getFloatTy(Ctx) : Type::getDoubleTy(Ctx);
unsigned EC = IsF32 ? 4 : 2;
VectorType *VecTy = VectorType::get(ScalarTy, EC, IsScalable);

for (Attribute::AttrKind Attr : CommonFnAttrs)
FuncAttrBuilder.addAttribute(Attr);
FuncAttrBuilder.addMemoryAttr(MemoryEffects::argMemOnly(ModRefInfo::Mod));

AttributeList Attrs;
Attrs = Attrs.addFnAttributes(Ctx, FuncAttrBuilder);

{
AttrBuilder ArgAttrBuilder(Ctx);
for (Attribute::AttrKind AK : CommonPtrArgAttrs)
ArgAttrBuilder.addAttribute(AK);
ArgAttrBuilder.addAlignmentAttr(DL.getABITypeAlign(VecTy));
Attrs = Attrs.addParamAttributes(Ctx, 1, ArgAttrBuilder);
}

PointerType *PtrTy = PointerType::get(Ctx, 0);
SmallVector<Type *, 4> ArgTys = {VecTy, PtrTy};
if (hasVectorMaskArgument(LibcallImpl))
ArgTys.push_back(VectorType::get(Type::getInt1Ty(Ctx), EC, IsScalable));

return {FunctionType::get(VecTy, ArgTys, false), Attrs};
}
case RTLIB::impl__ZGVnN2vl8l8_sincos:
case RTLIB::impl__ZGVnN4vl4l4_sincosf:
case RTLIB::impl__ZGVsNxvl8l8_sincos:
Expand Down Expand Up @@ -271,6 +321,8 @@ bool RuntimeLibcallsInfo::hasVectorMaskArgument(RTLIB::LibcallImpl Impl) {
/// FIXME: This should be generated by tablegen and support the argument at an
/// arbitrary position
switch (Impl) {
case RTLIB::impl_armpl_svmodf_f64_x:
case RTLIB::impl_armpl_svmodf_f32_x:
case RTLIB::impl_armpl_svsincos_f32_x:
case RTLIB::impl_armpl_svsincos_f64_x:
case RTLIB::impl_armpl_svsincospi_f32_x:
Expand Down
8 changes: 8 additions & 0 deletions llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
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Original file line number Diff line number Diff line change
@@ -1,6 +1,10 @@
; REQUIRES: aarch64-registered-target
; RUN: opt -S -passes=declare-runtime-libcalls -mtriple=aarch64-unknown-linux -mattr=+neon,+sve -vector-library=ArmPL < %s | FileCheck %s

; CHECK: declare <vscale x 4 x float> @armpl_svmodf_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS:#[0-9]+]]

; CHECK: declare <vscale x 2 x double> @armpl_svmodf_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS]]

; CHECK: declare void @armpl_svsincos_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS:#[0-9]+]]

; CHECK: declare void @armpl_svsincos_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS]]
Expand All @@ -9,6 +13,10 @@

; CHECK: declare void @armpl_svsincospi_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS]]

; CHECK: declare <4 x float> @armpl_vmodfq_f32(<4 x float>, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare <2 x double> @armpl_vmodfq_f64(<2 x double>, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @armpl_vsincospiq_f32(<4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @armpl_vsincospiq_f64(<2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]
Expand Down
10 changes: 9 additions & 1 deletion llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sleef.ll
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Original file line number Diff line number Diff line change
@@ -1,18 +1,26 @@
; REQUIRES: aarch64-registered-target
; RUN: opt -S -passes=declare-runtime-libcalls -mtriple=aarch64-unknown-linux -mattr=+neon,+sve -vector-library=sleefgnuabi < %s | FileCheck %s

; CHECK: declare void @_ZGVnN2vl8l8_sincos(<2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS:#[0-9]+]]
; CHECK: declare <2 x double> @_ZGVnN2vl8_modf(<2 x double>, ptr noalias nonnull writeonly align 16) [[ATTRS:#[0-9]+]]

; CHECK: declare void @_ZGVnN2vl8l8_sincos(<2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVnN2vl8l8_sincospi(<2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare <4 x float> @_ZGVnN4vl4_modff(<4 x float>, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVnN4vl4l4_sincosf(<4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVnN4vl4l4_sincospif(<4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare <vscale x 4 x float> @_ZGVsNxvl4_modff(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVsNxvl4l4_sincosf(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVsNxvl4l4_sincospif(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare <vscale x 2 x double> @_ZGVsNxvl8_modf(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVsNxvl8l8_sincos(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]

; CHECK: declare void @_ZGVsNxvl8l8_sincospi(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16) [[ATTRS]]
Expand Down
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