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4 changes: 2 additions & 2 deletions llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -619,11 +619,11 @@ bool PPCInstPrinter::showRegistersWithPercentPrefix(const char *RegName) const {
/// getVerboseConditionalRegName - This method expands the condition register
/// when requested explicitly or targetting Darwin.
const char *
PPCInstPrinter::getVerboseConditionRegName(unsigned RegNum,
PPCInstPrinter::getVerboseConditionRegName(MCRegister Reg,
unsigned RegEncoding) const {
if (!FullRegNames && !MAI.useFullRegisterNames())
return nullptr;
if (RegNum < PPC::CR0EQ || RegNum > PPC::CR7UN)
if (Reg < PPC::CR0EQ || Reg > PPC::CR7UN)
return nullptr;
const char *CRBits[] = {
"lt", "gt", "eq", "un",
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2 changes: 1 addition & 1 deletion llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ class PPCInstPrinter : public MCInstPrinter {
private:
bool showRegistersWithPercentPrefix(const char *RegName) const;
bool showRegistersWithPrefix() const;
const char *getVerboseConditionRegName(unsigned RegNum,
const char *getVerboseConditionRegName(MCRegister Reg,
unsigned RegEncoding) const;

public:
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4 changes: 2 additions & 2 deletions llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
Original file line number Diff line number Diff line change
Expand Up @@ -287,11 +287,11 @@ using llvm::MCPhysReg;

namespace llvm {
namespace PPC {
static inline bool isVFRegister(unsigned Reg) {
static inline bool isVFRegister(MCRegister Reg) {
return Reg >= PPC::VF0 && Reg <= PPC::VF31;
}

static inline bool isVRRegister(unsigned Reg) {
static inline bool isVRRegister(MCRegister Reg) {
return Reg >= PPC::V0 && Reg <= PPC::V31;
}

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