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[LoopInterchange] Fix tests with loops that have BTC=0. NFC. #167748
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[LoopInterchange] Fix tests with loops that have BTC=0. NFC. #167748
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Precommit test fixups for llvm#167113
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@llvm/pr-subscribers-llvm-transforms Author: Sjoerd Meijer (sjoerdmeijer) ChangesPrecommit test fixups for #167113 Full diff: https://github.com/llvm/llvm-project/pull/167748.diff 6 Files Affected:
diff --git a/llvm/test/Transforms/LoopInterchange/interchanged-loop-nest-4.ll b/llvm/test/Transforms/LoopInterchange/interchanged-loop-nest-4.ll
index 70fff161154d8..f61054409937c 100644
--- a/llvm/test/Transforms/LoopInterchange/interchanged-loop-nest-4.ll
+++ b/llvm/test/Transforms/LoopInterchange/interchanged-loop-nest-4.ll
@@ -36,7 +36,8 @@ for.body10.i.i.i: ; preds = %for.body10.i.i.i, %
%arrayidx.i.i.i = getelementptr [6 x ptr], ptr @g_78, i16 0, i16 %storemerge56.i.i.i
store ptr @g_75, ptr %arrayidx.i.i.i, align 1
%sub.i.i.i = add nsw i16 %storemerge56.i.i.i, -1
- br i1 true, label %for.inc14.i.i.i, label %for.body10.i.i.i
+ %cmp = icmp sgt i16 %sub.i.i.i, 0
+ br i1 %cmp, label %for.body10.i.i.i, label %for.inc14.i.i.i
for.inc14.i.i.i: ; preds = %for.body10.i.i.i
%add15.i.i.i = add nuw nsw i16 %l_105.18.i.i.i, 1
diff --git a/llvm/test/Transforms/LoopInterchange/lcssa-phi-outer-latch.ll b/llvm/test/Transforms/LoopInterchange/lcssa-phi-outer-latch.ll
index a5e3accaf8e10..92ce3288b4529 100644
--- a/llvm/test/Transforms/LoopInterchange/lcssa-phi-outer-latch.ll
+++ b/llvm/test/Transforms/LoopInterchange/lcssa-phi-outer-latch.ll
@@ -31,11 +31,13 @@ define i16 @main(ptr %a) {
; CHECK-NEXT: br label %[[INNER_LATCH:.*]]
; CHECK: [[INNER_LATCH]]:
; CHECK-NEXT: [[J_NEXT:%.*]] = add i16 [[J]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[J]], 42
; CHECK-NEXT: br label %[[OUTER_BODY:.*]]
; CHECK: [[INNER_LATCH_SPLIT]]:
; CHECK-NEXT: [[NEW_COND_LCSSA:%.*]] = phi i16 [ [[COND]], %[[OUTER_LATCH]] ]
; CHECK-NEXT: [[TMP1]] = add i16 [[J]], 1
-; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[INNER_HEADER]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i16 [[J]], 42
+; CHECK-NEXT: br i1 [[TMP2]], label %[[INNER_HEADER]], label %[[EXIT:.*]]
; CHECK: [[OUTER_BODY]]:
; CHECK-NEXT: br label %[[OUTER_LATCH]]
; CHECK: [[OUTER_LATCH]]:
@@ -62,7 +64,8 @@ inner.header:
inner.latch:
%j.next = add i16 %j, 1
- br i1 true, label %outer.body, label %inner.header
+ %cmp = icmp slt i16 %j, 42
+ br i1 %cmp, label %inner.header, label %outer.body
outer.body:
%new.cond.lcssa = phi i16 [ %cond, %inner.latch ]
diff --git a/llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll b/llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
index 6b25c3bc9a4ba..f02ee1a0ced19 100644
--- a/llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
+++ b/llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
@@ -21,33 +21,34 @@
define void @test1() {
entry:
- br label %for.body
+ br label %outer.header
-for.body: ; preds = %for.inc3, %entry
- %inc41 = phi i32 [ %inc4, %for.inc3 ], [ undef, %entry ]
- br label %for.body2
+outer.header:
+ %i = phi i32 [ %i.next, %outer.latch ], [ 0, %entry ]
+ br label %inner.header
-for.body2: ; preds = %for.inc, %for.body
- %lsr.iv = phi i32 [ %lsr.iv.next, %for.inc ], [ 1, %for.body ]
- br label %for.inc
+inner.header:
+ %j = phi i32 [ %j.next, %inner.latch ], [ 1, %outer.header ]
+ br label %inner.latch
-for.inc: ; preds = %for.body2
- %idxprom = sext i32 %inc41 to i64
+inner.latch:
+ %idxprom = sext i32 %i to i64
%arrayidx = getelementptr inbounds [5 x i32], ptr @b, i64 0, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4
store i32 undef, ptr %arrayidx, align 4
- %cmp = icmp slt i32 %lsr.iv, 4
- %lsr.iv.next = add nuw nsw i32 %lsr.iv, 1
- br i1 %cmp, label %for.body2, label %for.cond1.for.end_crit_edge
+ %cmp = icmp slt i32 %j, 4
+ %j.next = add nuw nsw i32 %j, 1
+ br i1 %cmp, label %inner.header, label %outer.body
-for.cond1.for.end_crit_edge: ; preds = %for.inc
- br label %for.inc3
+outer.body:
+ br label %outer.latch
-for.inc3: ; preds = %for.cond1.for.end_crit_edge
- %inc4 = add nsw i32 %inc41, 1
- br i1 false, label %for.body, label %for.cond.for.end5_crit_edge
+outer.latch:
+ %i.next = add nsw i32 %i, 1
+ %cmp2 = icmp slt i32 %i, 4
+ br i1 %cmp2, label %outer.header, label %exit
-for.cond.for.end5_crit_edge: ; preds = %for.inc3
+exit:
ret void
}
@@ -61,33 +62,34 @@ for.cond.for.end5_crit_edge: ; preds = %for.inc3
define void @test2() {
entry:
- br label %for.body
+ br label %outer.header
-for.body: ; preds = %for.inc3, %entry
- %inc41 = phi i32 [ %inc4, %for.inc3 ], [ undef, %entry ]
- br label %for.body2
+outer.header:
+ %i = phi i32 [ %i.next, %outer.latch ], [ 0, %entry ]
+ br label %inner.header
-for.body2: ; preds = %for.inc, %for.body
- %lsr.iv = phi i32 [ %lsr.iv.next, %for.inc ], [ 1, %for.body ]
- br label %for.inc
+inner.header:
+ %lsr.iv = phi i32 [ %lsr.iv.next, %inner.latch ], [ 1, %outer.header ]
+ br label %inner.latch
-for.inc: ; preds = %for.body2
- %idxprom = sext i32 %inc41 to i64
+inner.latch:
+ %idxprom = sext i32 %i to i64
%arrayidx = getelementptr inbounds [5 x i32], ptr @b, i64 0, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4
%cmp = icmp slt i32 %lsr.iv, 4
%cmp.zext = zext i1 %cmp to i32
store i32 %cmp.zext, ptr %arrayidx, align 4
%lsr.iv.next = add nuw nsw i32 %lsr.iv, 1
- br i1 %cmp, label %for.body2, label %for.cond1.for.end_crit_edge
+ br i1 %cmp, label %inner.header, label %outer.body
-for.cond1.for.end_crit_edge: ; preds = %for.inc
- br label %for.inc3
+outer.body:
+ br label %outer.latch
-for.inc3: ; preds = %for.cond1.for.end_crit_edge
- %inc4 = add nsw i32 %inc41, 1
- br i1 false, label %for.body, label %for.cond.for.end5_crit_edge
+outer.latch:
+ %i.next = add nsw i32 %i, 1
+ %cmp2 = icmp slt i32 %i, 4
+ br i1 %cmp2, label %outer.header, label %exit
-for.cond.for.end5_crit_edge: ; preds = %for.inc3
+exit:
ret void
}
diff --git a/llvm/test/Transforms/LoopInterchange/pr43326.ll b/llvm/test/Transforms/LoopInterchange/pr43326.ll
index c25c4fadd3042..cc4f07c722dd9 100644
--- a/llvm/test/Transforms/LoopInterchange/pr43326.ll
+++ b/llvm/test/Transforms/LoopInterchange/pr43326.ll
@@ -25,58 +25,58 @@ define void @pr43326() {
entry:
%0 = load i32, ptr @a
%tobool.not2 = icmp eq i32 %0, 0
- br i1 %tobool.not2, label %for.end14, label %for.body.lr.ph
+ br i1 %tobool.not2, label %for.end14, label %outer.preheader
-for.body.lr.ph: ; preds = %entry
+outer.preheader: ; preds = %entry
%d.promoted = load i32, ptr @d
%a.promoted = load i32, ptr @a
- br label %for.body
+ br label %outer.header
-for.body: ; preds = %for.body.lr.ph, %for.inc12
- %inc1312 = phi i32 [ %a.promoted, %for.body.lr.ph ], [ %inc13, %for.inc12 ]
- %xor.lcssa.lcssa11 = phi i32 [ %d.promoted, %for.body.lr.ph ], [ %xor.lcssa.lcssa, %for.inc12 ]
- br label %for.body3
+outer.header: ; preds = %outer.preheader, %for.inc12
+ %inc1312 = phi i32 [ %a.promoted, %outer.preheader ], [ %inc13, %for.inc12 ]
+ %xor.lcssa.lcssa11 = phi i32 [ %d.promoted, %outer.preheader ], [ %xor.lcssa.lcssa, %for.inc12 ]
+ br label %inner1.header
-for.body3: ; preds = %for.body, %for.inc10
- %xor.lcssa9 = phi i32 [ %xor.lcssa.lcssa11, %for.body ], [ %xor.lcssa, %for.inc10 ]
- %dec7 = phi i8 [ 0, %for.body ], [ %dec, %for.inc10 ]
- %idxprom8 = sext i8 %dec7 to i64
- br label %for.body7
+inner1.header: ; preds = %outer.header, %for.inc10
+ %xor.lcssa9 = phi i32 [ %xor.lcssa.lcssa11, %outer.header ], [ %xor.lcssa, %for.inc10 ]
+ %j = phi i8 [ 0, %outer.header ], [ %j.next, %for.inc10 ]
+ %idxprom8 = sext i8 %j to i64
+ br label %inner2.header
-for.body7: ; preds = %for.body3, %for.inc
- %xor5 = phi i32 [ %xor.lcssa9, %for.body3 ], [ %xor, %for.inc ]
- %inc4 = phi i32 [ 0, %for.body3 ], [ %inc, %for.inc ]
- %idxprom = sext i32 %inc4 to i64
+inner2.header: ; preds = %inner1.header, %for.inc
+ %xor5 = phi i32 [ %xor.lcssa9, %inner1.header ], [ %xor, %for.inc ]
+ %k = phi i32 [ 0, %inner1.header ], [ %k.next, %for.inc ]
+ %idxprom = sext i32 %k to i64
%arrayidx9 = getelementptr inbounds [1 x [1 x i32]], ptr @e, i64 0, i64 %idxprom, i64 %idxprom8
%1 = load i32, ptr %arrayidx9
%xor = xor i32 %xor5, %1
br label %for.inc
-for.inc: ; preds = %for.body7
- %inc = add nsw i32 %inc4, 1
- %cmp5 = icmp slt i32 %inc, 1
- br i1 %cmp5, label %for.body7, label %for.end
+for.inc: ; preds = %inner2.header
+ %k.next = add nsw i32 %k, 1
+ %cmp5 = icmp slt i32 %k.next, 42
+ br i1 %cmp5, label %inner2.header, label %for.end
for.end: ; preds = %for.inc
%xor.lcssa = phi i32 [ %xor, %for.inc ]
- %inc.lcssa = phi i32 [ %inc, %for.inc ]
+ %inc.lcssa = phi i32 [ %k.next, %for.inc ]
br label %for.inc10
for.inc10: ; preds = %for.end
- %dec = add i8 %dec7, -1
- %cmp = icmp sgt i8 %dec, -1
- br i1 %cmp, label %for.body3, label %for.end11
+ %j.next = add i8 %j, -1
+ %cmp = icmp sgt i8 %j.next, -1
+ br i1 %cmp, label %inner1.header, label %for.end11
for.end11: ; preds = %for.inc10
%xor.lcssa.lcssa = phi i32 [ %xor.lcssa, %for.inc10 ]
- %dec.lcssa = phi i8 [ %dec, %for.inc10 ]
+ %dec.lcssa = phi i8 [ %j.next, %for.inc10 ]
%inc.lcssa.lcssa = phi i32 [ %inc.lcssa, %for.inc10 ]
br label %for.inc12
for.inc12: ; preds = %for.end11
%inc13 = add nsw i32 %inc1312, 1
%tobool.not = icmp eq i32 %inc13, 0
- br i1 %tobool.not, label %for.cond.for.end14_crit_edge, label %for.body
+ br i1 %tobool.not, label %for.cond.for.end14_crit_edge, label %outer.header
for.cond.for.end14_crit_edge: ; preds = %for.inc12
%inc13.lcssa = phi i32 [ %inc13, %for.inc12 ]
diff --git a/llvm/test/Transforms/LoopInterchange/pr57148.ll b/llvm/test/Transforms/LoopInterchange/pr57148.ll
index 0d4194762a692..747dbbcb4a44e 100644
--- a/llvm/test/Transforms/LoopInterchange/pr57148.ll
+++ b/llvm/test/Transforms/LoopInterchange/pr57148.ll
@@ -126,7 +126,8 @@ define void @test2() {
; CHECK-NEXT: br i1 true, label [[MIDDLE_BLOCK80]], label [[VECTOR_BODY85]]
; CHECK: middle.block80:
; CHECK-NEXT: [[INC66]] = add nuw nsw i16 [[J_165]], 1
-; CHECK-NEXT: br i1 true, label [[FOR_COND75_PREHEADER:%.*]], label [[FOR_COND37_PREHEADER]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[INC66]], 42
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_COND75_PREHEADER:%.*]], label [[FOR_COND37_PREHEADER]]
; CHECK: for.inc68:
; CHECK-NEXT: [[INC69]] = add nuw nsw i16 [[I_166]], 1
; CHECK-NEXT: [[EXITCOND77_NOT:%.*]] = icmp eq i16 [[INC69]], 2
@@ -156,7 +157,8 @@ vector.body85: ; preds = %vector.body85, %for
middle.block80: ; preds = %vector.body85
%inc66 = add nuw nsw i16 %j.165, 1
- br i1 true, label %for.inc68, label %for.cond37.preheader
+ %cmp = icmp slt i16 %inc66, 42
+ br i1 %cmp, label %for.inc68, label %for.cond37.preheader
for.inc68: ; preds = %middle.block80
%inc69 = add nuw nsw i16 %i.166, 1
diff --git a/llvm/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll b/llvm/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll
index 27d99e05e84ee..51fda4cf1ebe1 100644
--- a/llvm/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll
+++ b/llvm/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll
@@ -301,13 +301,13 @@ for.body3: ; preds = %for.body3, %outer.h
%vB = load float, ptr %arrayidx6
%float.inner.inc.inc = fadd fast float %float.inner.inc, %vB
%iv.inner.next = add nuw nsw i64 %iv.inner, 1
- %exitcond = icmp eq i64 %iv.inner.next, 100
- br i1 %exitcond, label %outer.inc, label %for.body3
+ %exitcond = icmp slt i64 %iv.inner.next, 100
+ br i1 %exitcond, label %for.body3, label %outer.inc
outer.inc: ; preds = %for.body3
%float.inner.lcssa = phi float [ %float.inner.inc.inc, %for.body3 ]
%iv.outer.next = add nsw i64 %iv.outer, 1
- %cmp = icmp eq i64 %iv.outer.next, 100
+ %cmp = icmp slt i64 %iv.outer.next, 100
br i1 %cmp, label %outer.header, label %for.exit
for.exit: ; preds = %outer.inc
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kasuga-fj
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LGTM, thanks
fhahn
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Thanks for going through and updating the test cases!
Precommit test fixups for #167113