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42 changes: 19 additions & 23 deletions llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@
#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/Pass.h"
#include <variant>

namespace llvm {

Expand All @@ -27,54 +28,49 @@ struct ArgDescriptor {
friend struct AMDGPUFunctionArgInfo;
friend class AMDGPUArgumentUsageInfo;

union {
MCRegister Reg;
unsigned StackOffset;
};
std::variant<std::monostate, MCRegister, unsigned> Val;

// Bitmask to locate argument within the register.
unsigned Mask;

bool IsStack : 1;
bool IsSet : 1;

public:
ArgDescriptor(unsigned Val = 0, unsigned Mask = ~0u, bool IsStack = false,
bool IsSet = false)
: Reg(Val), Mask(Mask), IsStack(IsStack), IsSet(IsSet) {}
ArgDescriptor(unsigned Mask = ~0u) : Mask(Mask) {}

static ArgDescriptor createRegister(Register Reg, unsigned Mask = ~0u) {
return ArgDescriptor(Reg, Mask, false, true);
ArgDescriptor Ret(Mask);
Ret.Val = Reg.asMCReg();
return Ret;
}

static ArgDescriptor createStack(unsigned Offset, unsigned Mask = ~0u) {
return ArgDescriptor(Offset, Mask, true, true);
ArgDescriptor Ret(Mask);
Ret.Val = Offset;
return Ret;
}

static ArgDescriptor createArg(const ArgDescriptor &Arg, unsigned Mask) {
return ArgDescriptor(Arg.Reg.id(), Mask, Arg.IsStack, Arg.IsSet);
// Copy the descriptor, then change the mask.
ArgDescriptor Ret(Arg);
Ret.Mask = Mask;
return Ret;
}

bool isSet() const {
return IsSet;
}
bool isSet() const { return !std::holds_alternative<std::monostate>(Val); }

explicit operator bool() const {
return isSet();
}

bool isRegister() const {
return !IsStack;
}
bool isRegister() const { return std::holds_alternative<MCRegister>(Val); }

MCRegister getRegister() const {
assert(!IsStack);
return Reg;
assert(isRegister());
return std::get<MCRegister>(Val);
}

unsigned getStackOffset() const {
assert(IsStack);
return StackOffset;
assert(std::holds_alternative<unsigned>(Val));
return std::get<unsigned>(Val);
}

unsigned getMask() const {
Expand Down
4 changes: 3 additions & 1 deletion llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -1014,7 +1014,9 @@ class SIMachineFunctionInfo final : public AMDGPUMachineFunction,
void setNumWaveDispatchVGPRs(unsigned Count) { NumWaveDispatchVGPRs = Count; }

Register getPrivateSegmentWaveByteOffsetSystemSGPR() const {
return ArgInfo.PrivateSegmentWaveByteOffset.getRegister();
if (ArgInfo.PrivateSegmentWaveByteOffset)
return ArgInfo.PrivateSegmentWaveByteOffset.getRegister();
return MCRegister();
}

/// Returns the physical register reserved for use as the resource
Expand Down
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