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AMDGPU: Fix a comment #169403

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Nov 24, 2025
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AMDGPU: Fix a comment #169403

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7 changes: 4 additions & 3 deletions llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5518,9 +5518,10 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
Desc.getNumOperands() + Desc.implicit_uses().size();
const unsigned NumImplicitOps = IsDst ? 2 : 1;

// Allow additional implicit operands. This allows a fixup done by the post
// RA scheduler where the main implicit operand is killed and implicit-defs
// are added for sub-registers that remain live after this instruction.
// Require additional implicit operands. This allows a fixup done by the
// post RA scheduler where the main implicit operand is killed and
// implicit-defs are added for sub-registers that remain live after this
// instruction.
if (MI.getNumOperands() < StaticNumOps + NumImplicitOps) {
ErrInfo = "missing implicit register operands";
return false;
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