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10 changes: 0 additions & 10 deletions clang/include/clang/Options/Options.td
Original file line number Diff line number Diff line change
Expand Up @@ -1427,16 +1427,6 @@ def fhip_emit_relocatable : Flag<["-"], "fhip-emit-relocatable">,
HelpText<"Compile HIP source to relocatable">;
def fno_hip_emit_relocatable : Flag<["-"], "fno-hip-emit-relocatable">,
HelpText<"Do not override toolchain to compile HIP source to relocatable">;
def use_spirv_backend
: Flag<["-"], "use-spirv-backend">,
Group<hip_Group>,
Flags<[HelpHidden]>,
HelpText<"Use the SPIRV backend for compilation ">;
def no_use_spirv_backend
: Flag<["-"], "no-use-spirv-backend">,
Group<hip_Group>,
Flags<[HelpHidden]>,
HelpText<"Do not use the SPIRV backend for compilation ">;
}

// Clang specific/exclusive options for OpenACC.
Expand Down
44 changes: 3 additions & 41 deletions clang/lib/Driver/Driver.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5024,24 +5024,15 @@ Action *Driver::BuildOffloadingActions(Compilation &C,
// Compiling HIP in device-only non-RDC mode requires linking each action
// individually.
for (Action *&A : DeviceActions) {
// Special handling for the HIP SPIR-V toolchain because it doesn't use
// the SPIR-V backend yet doesn't report the output as an object.
bool IsAMDGCNSPIRV = A->getOffloadingToolChain() &&
A->getOffloadingToolChain()->getTriple().getOS() ==
llvm::Triple::OSType::AMDHSA &&
A->getOffloadingToolChain()->getTriple().isSPIRV();
bool UseSPIRVBackend = Args.hasFlag(options::OPT_use_spirv_backend,
options::OPT_no_use_spirv_backend,
/*Default=*/false);

// Special handling for the HIP SPIR-V toolchain in device-only.
// The translator path has a linking step, whereas the SPIR-V backend path
// does not to avoid any external dependency such as spirv-link. The
// linking step is skipped for the SPIR-V backend path.
bool IsAMDGCNSPIRVWithBackend = IsAMDGCNSPIRV && UseSPIRVBackend;

if ((A->getType() != types::TY_Object && !IsAMDGCNSPIRV &&
A->getType() != types::TY_LTO_BC) ||
HIPRelocatableObj || !HIPNoRDC || !offloadDeviceOnly() ||
(IsAMDGCNSPIRVWithBackend && offloadDeviceOnly()))
HIPRelocatableObj || !HIPNoRDC || !offloadDeviceOnly())
continue;
ActionList LinkerInput = {A};
A = C.MakeAction<LinkJobAction>(LinkerInput, types::TY_Image);
Expand Down Expand Up @@ -5267,28 +5258,12 @@ Action *Driver::ConstructPhaseAction(
Args.hasArg(options::OPT_S) ? types::TY_LTO_IR : types::TY_LTO_BC;
return C.MakeAction<BackendJobAction>(Input, Output);
}
bool UseSPIRVBackend = Args.hasFlag(options::OPT_use_spirv_backend,
options::OPT_no_use_spirv_backend,
/*Default=*/false);

auto OffloadingToolChain = Input->getOffloadingToolChain();
// For AMD SPIRV, if offloadDeviceOnly(), we call the SPIRV backend unless
// LLVM bitcode was requested explicitly or RDC is set. If
// !offloadDeviceOnly, we emit LLVM bitcode, and clang-linker-wrapper will
// compile it to SPIRV.
bool UseSPIRVBackendForHipDeviceOnlyNoRDC =
TargetDeviceOffloadKind == Action::OFK_HIP && OffloadingToolChain &&
OffloadingToolChain->getTriple().isSPIRV() && UseSPIRVBackend &&
offloadDeviceOnly() &&
!Args.hasFlag(options::OPT_fgpu_rdc, options::OPT_fno_gpu_rdc, false);

if (Args.hasArg(options::OPT_emit_llvm) ||
TargetDeviceOffloadKind == Action::OFK_SYCL ||
(((Input->getOffloadingToolChain() &&
Input->getOffloadingToolChain()->getTriple().isAMDGPU() &&
TargetDeviceOffloadKind != Action::OFK_None) ||
TargetDeviceOffloadKind == Action::OFK_HIP) &&
!UseSPIRVBackendForHipDeviceOnlyNoRDC &&
((Args.hasFlag(options::OPT_fgpu_rdc, options::OPT_fno_gpu_rdc,
false) ||
(Args.hasFlag(options::OPT_offload_new_driver,
Expand All @@ -5310,19 +5285,6 @@ Action *Driver::ConstructPhaseAction(
: types::TY_LLVM_BC;
return C.MakeAction<BackendJobAction>(Input, Output);
}

// The SPIRV backend compilation path for HIP must avoid external
// dependencies. The default compilation path assembles and links its
// output, but the SPIRV assembler and linker are external tools. This code
// ensures the backend emits binary SPIRV directly to bypass those steps and
// avoid failures. Without -save-temps, the compiler may already skip
// assembling and linking. With -save-temps, these steps must be explicitly
// disabled, as done here. We also force skipping these steps regardless of
// -save-temps to avoid relying on optimizations (unless -S is set).
// The current HIP bundling expects the type to be types::TY_Image
if (UseSPIRVBackendForHipDeviceOnlyNoRDC && !Args.hasArg(options::OPT_S))
return C.MakeAction<BackendJobAction>(Input, types::TY_Image);

return C.MakeAction<BackendJobAction>(Input, types::TY_PP_Asm);
}
case phases::Assemble:
Expand Down
10 changes: 1 addition & 9 deletions clang/lib/Driver/ToolChains/Clang.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5057,10 +5057,6 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
Args.ClaimAllArgs(options::OPT_femit_dwarf_unwind_EQ);
}

bool IsAMDSPIRVForHIPDevice =
IsHIPDevice && getToolChain().getTriple().isSPIRV() &&
getToolChain().getTriple().getVendor() == llvm::Triple::AMD;

if (isa<AnalyzeJobAction>(JA)) {
assert(JA.getType() == types::TY_Plist && "Invalid output type.");
CmdArgs.push_back("-analyze");
Expand Down Expand Up @@ -5158,8 +5154,6 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
rewriteKind = RK_Fragile;
} else if (JA.getType() == types::TY_CIR) {
CmdArgs.push_back("-emit-cir");
} else if (JA.getType() == types::TY_Image && IsAMDSPIRVForHIPDevice) {
CmdArgs.push_back("-emit-obj");
} else {
assert(JA.getType() == types::TY_PP_Asm && "Unexpected output type!");
}
Expand Down Expand Up @@ -9090,9 +9084,7 @@ void LinkerWrapper::ConstructJob(Compilation &C, const JobAction &JA,
OPT_fno_lto,
OPT_flto,
OPT_flto_partitions_EQ,
OPT_flto_EQ,
OPT_use_spirv_backend};

OPT_flto_EQ};
const llvm::DenseSet<unsigned> LinkerOptions{OPT_mllvm, OPT_Zlinker_input};
auto ShouldForwardForToolChain = [&](Arg *A, const ToolChain &TC) {
// Don't forward -mllvm to toolchains that don't support LLVM.
Expand Down
48 changes: 13 additions & 35 deletions clang/lib/Driver/ToolChains/HIPAMD.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -159,9 +159,10 @@ void AMDGCN::Linker::constructLldCommand(Compilation &C, const JobAction &JA,

// For SPIR-V the inputs for the job are device AMDGCN SPIR-V flavoured bitcode
// and the output is either a compiled SPIR-V binary or bitcode (-emit-llvm). It
// calls llvm-link and then the llvm-spirv translator or the SPIR-V BE.
// TODO: consider if we want to run any targeted optimisations over IR here,
// over generic SPIR-V.
// calls llvm-link and then the llvm-spirv translator. Once the SPIR-V BE will
// be promoted from experimental, we will switch to using that. TODO: consider
// if we want to run any targeted optimisations over IR here, over generic
// SPIR-V.
void AMDGCN::Linker::constructLinkAndEmitSpirvCommand(
Compilation &C, const JobAction &JA, const InputInfoList &Inputs,
const InputInfo &Output, const llvm::opt::ArgList &Args) const {
Expand All @@ -172,40 +173,17 @@ void AMDGCN::Linker::constructLinkAndEmitSpirvCommand(
const char *LinkedBCFilePath = HIP::getTempFile(C, LinkedBCFilePrefix, "bc");
InputInfo LinkedBCFile(&JA, LinkedBCFilePath, Output.getBaseInput());

bool UseSPIRVBackend =
Args.hasFlag(options::OPT_use_spirv_backend,
options::OPT_no_use_spirv_backend, /*Default=*/false);

constructLlvmLinkCommand(C, JA, Inputs, LinkedBCFile, Args);

if (UseSPIRVBackend) {
// This code handles the case in the new driver when --offload-device-only
// is unset and clang-linker-wrapper forwards the bitcode that must be
// compiled to SPIR-V.

llvm::opt::ArgStringList CmdArgs;
const char *Triple =
C.getArgs().MakeArgString("-triple=spirv64-amd-amdhsa");

CmdArgs.append({"-cc1", Triple, "-emit-obj", "-disable-llvm-optzns",
LinkedBCFile.getFilename(), "-o", Output.getFilename()});

const char *Exec = getToolChain().getDriver().getClangProgramPath();
C.addCommand(std::make_unique<Command>(JA, *this,
ResponseFileSupport::None(), Exec,
CmdArgs, LinkedBCFile, Output));
} else {
// Emit SPIR-V binary using the translator
llvm::opt::ArgStringList TrArgs{
"--spirv-max-version=1.6",
"--spirv-ext=+all",
"--spirv-allow-unknown-intrinsics",
"--spirv-lower-const-expr",
"--spirv-preserve-auxdata",
"--spirv-debug-info-version=nonsemantic-shader-200"};
SPIRV::constructTranslateCommand(C, *this, JA, Output, LinkedBCFile,
TrArgs);
}
// Emit SPIR-V binary.
llvm::opt::ArgStringList TrArgs{
"--spirv-max-version=1.6",
"--spirv-ext=+all",
"--spirv-allow-unknown-intrinsics",
"--spirv-lower-const-expr",
"--spirv-preserve-auxdata",
"--spirv-debug-info-version=nonsemantic-shader-200"};
SPIRV::constructTranslateCommand(C, *this, JA, Output, LinkedBCFile, TrArgs);
}

// For amdgcn the inputs of the linker job are device bitcode and output is
Expand Down
57 changes: 0 additions & 57 deletions clang/test/Driver/hip-spirv-backend-bindings.c

This file was deleted.

61 changes: 0 additions & 61 deletions clang/test/Driver/hip-spirv-backend-opt.c

This file was deleted.

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