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[IndVars] Strengthen inference of samesign flags #170363

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Merged
preames merged 3 commits into from
Dec 3, 2025
Merged

[IndVars] Strengthen inference of samesign flags #170363

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2ddb263
[IndVars] Strengthen inference of samesign flags
preames Dec 2, 2025
e5005a3
Merge branch 'main' into perf/indvars-samesign-improvements
preames Dec 3, 2025
58e5788
Adjust to use havaSameSign
preames Dec 3, 2025
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17 changes: 9 additions & 8 deletions llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
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Expand Up @@ -277,15 +277,16 @@ void SimplifyIndvar::eliminateIVComparison(ICmpInst *ICmp,
LLVM_DEBUG(dbgs() << "INDVARS: Eliminated comparison: " << *ICmp << '\n');
} else if (makeIVComparisonInvariant(ICmp, IVOperand)) {
// fallthrough to end of function
} else if (ICmpInst::isSigned(OriginalPred) &&
SE->isKnownNonNegative(S) && SE->isKnownNonNegative(X)) {
// If we were unable to make anything above, all we can is to canonicalize
// the comparison hoping that it will open the doors for other
// optimizations. If we find out that we compare two non-negative values,
// we turn the instruction's predicate to its unsigned version. Note that
// we cannot rely on Pred here unless we check if we have swapped it.
} else if ((ICmpInst::isSigned(OriginalPred) ||
(ICmpInst::isUnsigned(OriginalPred) && !ICmp->hasSameSign())) &&
((SE->isKnownNegative(S) && SE->isKnownNegative(X)) ||
(SE->isKnownNonNegative(S) && SE->isKnownNonNegative(X)))) {
// Set the samesign flag on the compare if legal, and canonicalize to
// the unsigned variant (for signed compares) hoping that it will open
// the doors for other optimizations. Note that we cannot rely on Pred
// here unless we check if we have swapped it.
assert(ICmp->getPredicate() == OriginalPred && "Predicate changed?");
LLVM_DEBUG(dbgs() << "INDVARS: Turn to unsigned comparison: " << *ICmp
LLVM_DEBUG(dbgs() << "INDVARS: Marking comparison samesign: " << *ICmp
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@fhahn fhahn Dec 3, 2025

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We now print this message when covnert the predicate + added samesign or just added samesign to an existing compare. It might be good to still mention the conversion to unsigned, although I am not sure it is worth it.

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@preames preames Dec 3, 2025

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I had actually written it the other way to start with, but hadn't found the control complexity worth it. My reasoning ended up being that we weren't actually converting to unsigned anymore, we were converting to samesign (i.e. either signed or unsigned), and happen to prefer unsigned as the canonical form for that.

Happy to reverse if you'd like, it's a pretty minor point.

<< '\n');
ICmp->setPredicate(ICmpInst::getUnsignedPredicate(OriginalPred));
ICmp->setSameSign();
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4 changes: 2 additions & 2 deletions llvm/test/Analysis/ScalarEvolution/pr44605.ll
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Expand Up @@ -21,12 +21,12 @@ define i32 @test() {
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[LOCAL_3_4]]
; CHECK-NEXT: [[TMP2]] = add i32 [[TMP1]], [[LOCAL_3_31]]
; CHECK-NEXT: [[TMP3]] = add nuw nsw i32 [[LOCAL_7_3]], 1
; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i32 [[LOCAL_7_3]], 4
; CHECK-NEXT: [[TMP4:%.*]] = icmp samesign ugt i32 [[LOCAL_7_3]], 4
; CHECK-NEXT: br i1 [[TMP4]], label [[LATCH]], label [[INNER]]
; CHECK: latch:
; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP2]], [[INNER]] ]
; CHECK-NEXT: [[TMP5]] = add nuw nsw i32 [[LOCAL_6_6]], 1
; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i32 [[LOCAL_6_6]], 276
; CHECK-NEXT: [[TMP6:%.*]] = icmp samesign ugt i32 [[LOCAL_6_6]], 276
; CHECK-NEXT: br i1 [[TMP6]], label [[RETURN:%.*]], label [[OUTER]]
; CHECK: return:
; CHECK-NEXT: [[DOTLCSSA_LCSSA:%.*]] = phi i32 [ [[DOTLCSSA]], [[LATCH]] ]
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3 changes: 1 addition & 2 deletions llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
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Expand Up @@ -237,8 +237,7 @@ define i32 @test4(i32 %a) {
; CHECK-NEXT: [[CONV3:%.*]] = trunc i32 [[OR]] to i8
; CHECK-NEXT: [[CALL:%.*]] = call i32 @fn1(i8 signext [[CONV3]])
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i32 [[INDVARS_IV]], -1
; CHECK-NEXT: [[TMP0:%.*]] = trunc nuw i32 [[INDVARS_IV_NEXT]] to i8
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TMP0]], -14
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[INDVARS_IV_NEXT]], 242
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK: for.end:
; CHECK-NEXT: ret i32 0
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
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Expand Up @@ -749,7 +749,7 @@ define i32 @different_ivs(ptr %array, i32 %length, i32 %n) #0 {
; CHECK-V8M-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-V8M-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp ult i64 [[I_NEXT]], [[N64]]
; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp samesign ult i64 [[I_NEXT]], [[N64]]
; CHECK-V8M-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK-V8M: exit:
; CHECK-V8M-NEXT: [[RESULT:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
Expand Down Expand Up @@ -778,7 +778,7 @@ define i32 @different_ivs(ptr %array, i32 %length, i32 %n) #0 {
; CHECK-V8A-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-V8A-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp ult i64 [[I_NEXT]], [[N64]]
; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp samesign ult i64 [[I_NEXT]], [[N64]]
; CHECK-V8A-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK-V8A: exit:
; CHECK-V8A-NEXT: [[RESULT:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll
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Expand Up @@ -60,7 +60,7 @@ define dso_local arm_aapcscc void @test(ptr nocapture %pDest, ptr nocapture read
; CHECK-NEXT: [[ADD_PTR23]] = getelementptr inbounds i16, ptr [[PSRCB_ADDR_173]], i32 4
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i32, ptr [[PDEST_ADDR_175]], i32 1
; CHECK-NEXT: [[ADD24]] = add nuw nsw i32 [[J_076]], 4
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[ADD24]], [[TMP0]]
; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i32 [[ADD24]], [[TMP0]]
; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY3]], label [[FOR_END_LOOPEXIT:%.*]]
; CHECK: for.end.loopexit:
; CHECK-NEXT: [[ADD_PTR_LCSSA:%.*]] = phi ptr [ [[ADD_PTR]], [[FOR_BODY3]] ]
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6 changes: 3 additions & 3 deletions llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll
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Expand Up @@ -414,7 +414,7 @@ define void @test_08(i32 %n) {
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[IV]], [[SEXT]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[IV]], [[ZEXT]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp samesign ult i64 [[IV]], [[ZEXT]]
; CHECK-NEXT: [[CMP:%.*]] = and i1 [[TMP0]], [[TMP1]]
; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
Expand Down Expand Up @@ -600,7 +600,7 @@ define void @test_13b(i32 %n) {
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 2
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i64 [[IV]], 1024
; CHECK-NEXT: [[TMP0:%.*]] = icmp samesign ult i64 [[IV]], 1024
; CHECK-NEXT: br i1 [[TMP0]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
Expand All @@ -625,7 +625,7 @@ define void @test_13c(i32 %n) {
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 2
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i64 [[IV]], 1024
; CHECK-NEXT: [[TMP0:%.*]] = icmp samesign ult i64 [[IV]], 1024
; CHECK-NEXT: br i1 [[TMP0]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/IndVarSimplify/X86/pr59615.ll
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Expand Up @@ -18,7 +18,7 @@ define void @test() {
; CHECK: bb8:
; CHECK-NEXT: [[VAR9:%.*]] = load atomic i32, ptr addrspace(1) poison unordered, align 8, !range [[RNG0]], !invariant.load [[META1]], !noundef [[META1]]
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[VAR9]] to i64
; CHECK-NEXT: [[VAR10:%.*]] = icmp ult i64 [[INDVARS_IV]], [[TMP0]]
; CHECK-NEXT: [[VAR10:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], [[TMP0]]
; CHECK-NEXT: br i1 [[VAR10]], label [[BB12]], label [[BB11:%.*]]
; CHECK: bb11:
; CHECK-NEXT: ret void
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4 changes: 2 additions & 2 deletions llvm/test/Transforms/IndVarSimplify/backedge-on-min-max.ll
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Expand Up @@ -535,7 +535,7 @@ define void @min.unsigned.3(ptr %a, i32 %n) {
; CHECK-NEXT: store i32 [[IDX]], ptr [[ADDR]], align 4
; CHECK-NEXT: br label [[LATCH]]
; CHECK: latch:
; CHECK-NEXT: [[BE_COND:%.*]] = icmp ult i32 [[IDX_INC]], [[UMIN]]
; CHECK-NEXT: [[BE_COND:%.*]] = icmp samesign ult i32 [[IDX_INC]], [[UMIN]]
; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
; CHECK: exit.loopexit:
; CHECK-NEXT: br label [[EXIT]]
Expand Down Expand Up @@ -586,7 +586,7 @@ define void @min.unsigned.4(ptr %a, i32 %n) {
; CHECK-NEXT: store i32 [[IDX]], ptr [[ADDR]], align 4
; CHECK-NEXT: br label [[LATCH]]
; CHECK: latch:
; CHECK-NEXT: [[BE_COND:%.*]] = icmp ult i32 [[IDX_INC]], [[UMIN]]
; CHECK-NEXT: [[BE_COND:%.*]] = icmp samesign ult i32 [[IDX_INC]], [[UMIN]]
; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
; CHECK: exit.loopexit:
; CHECK-NEXT: br label [[EXIT]]
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4 changes: 2 additions & 2 deletions llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll
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Expand Up @@ -21,7 +21,7 @@ define i32 @test_01(i32 %a, i32 %b, ptr %p) {
; CHECK-NEXT: store i32 [[A:%.*]], ptr [[P]], align 4
; CHECK-NEXT: br label [[MERGE]]
; CHECK: merge:
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[IV]], 100
; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i32 [[IV]], 100
; CHECK-NEXT: br i1 [[CMP2]], label [[B3:%.*]], label [[B4:%.*]]
; CHECK: b3:
; CHECK-NEXT: store i32 [[IV]], ptr [[P]], align 4
Expand Down Expand Up @@ -89,7 +89,7 @@ define i32 @test_02(i32 %a, i32 %b, ptr %p) {
; CHECK-NEXT: store i32 [[A:%.*]], ptr [[P]], align 4
; CHECK-NEXT: br label [[MERGE]]
; CHECK: merge:
; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 100, [[IV]]
; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ugt i32 100, [[IV]]
; CHECK-NEXT: br i1 [[CMP2]], label [[B3:%.*]], label [[B4:%.*]]
; CHECK: b3:
; CHECK-NEXT: store i32 [[IV]], ptr [[P]], align 4
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/IndVarSimplify/constant_result.ll
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Expand Up @@ -12,7 +12,7 @@ define i16 @foo() {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [400 x i16], ptr @Y, i16 0, i16 [[I]]
; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX]], align 1
; CHECK-NEXT: [[INC]] = add nuw nsw i16 [[I]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i16 [[INC]], 400
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i16 [[INC]], 400
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK: for.end:
; CHECK-NEXT: ret i16 400
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/Transforms/IndVarSimplify/cycled_phis.ll
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Expand Up @@ -144,7 +144,7 @@ define i32 @start.from.sibling.iv(ptr %len.ptr, ptr %sibling.len.ptr) {
; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]]
; CHECK: sibling.loop:
; CHECK-NEXT: [[SIBLING_IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[SIBLING_IV_NEXT:%.*]], [[SIBLING_BACKEDGE:%.*]] ]
; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp ult i32 [[SIBLING_IV]], [[SIBLING_LEN]]
; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp samesign ult i32 [[SIBLING_IV]], [[SIBLING_LEN]]
; CHECK-NEXT: br i1 [[SIBLING_RC]], label [[SIBLING_BACKEDGE]], label [[FAILED_SIBLING:%.*]]
; CHECK: sibling.backedge:
; CHECK-NEXT: [[SIBLING_IV_NEXT]] = add nuw nsw i32 [[SIBLING_IV]], 1
Expand Down Expand Up @@ -235,7 +235,7 @@ define i32 @start.from.sibling.iv.wide(ptr %len.ptr, ptr %sibling.len.ptr) {
; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]]
; CHECK: sibling.loop:
; CHECK-NEXT: [[SIBLING_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[SIBLING_IV_NEXT:%.*]], [[SIBLING_BACKEDGE:%.*]] ]
; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]]
; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp samesign ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]]
; CHECK-NEXT: br i1 [[SIBLING_RC]], label [[SIBLING_BACKEDGE]], label [[FAILED_SIBLING:%.*]]
; CHECK: sibling.backedge:
; CHECK-NEXT: [[SIBLING_IV_NEXT]] = add nuw nsw i64 [[SIBLING_IV]], 1
Expand Down Expand Up @@ -331,7 +331,7 @@ define i32 @start.from.sibling.iv.wide.cycled.phis(ptr %len.ptr, ptr %sibling.le
; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]]
; CHECK: sibling.loop:
; CHECK-NEXT: [[SIBLING_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[SIBLING_IV_NEXT:%.*]], [[SIBLING_BACKEDGE:%.*]] ]
; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]]
; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp samesign ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]]
; CHECK-NEXT: br i1 [[SIBLING_RC]], label [[SIBLING_BACKEDGE]], label [[FAILED_SIBLING:%.*]]
; CHECK: sibling.backedge:
; CHECK-NEXT: [[SIBLING_IV_NEXT]] = add nuw nsw i64 [[SIBLING_IV]], 1
Expand Down Expand Up @@ -449,7 +449,7 @@ define i32 @start.from.sibling.iv.wide.cycled.phis.complex.phis(ptr %len.ptr, pt
; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]]
; CHECK: sibling.loop:
; CHECK-NEXT: [[SIBLING_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[SIBLING_IV_NEXT:%.*]], [[SIBLING_BACKEDGE:%.*]] ]
; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]]
; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp samesign ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]]
; CHECK-NEXT: br i1 [[SIBLING_RC]], label [[SIBLING_BACKEDGE]], label [[FAILED_SIBLING:%.*]]
; CHECK: sibling.backedge:
; CHECK-NEXT: [[SIBLING_IV_NEXT]] = add nuw nsw i64 [[SIBLING_IV]], 1
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/Transforms/IndVarSimplify/eliminate-exit.ll
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Expand Up @@ -193,7 +193,7 @@ define void @mixed_width(i32 %len) {
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i64 [[IV]], [[LEN_ZEXT]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp samesign ult i64 [[IV]], [[LEN_ZEXT]]
; CHECK-NEXT: br i1 [[CMP1]], label [[BACKEDGE]], label [[EXIT:%.*]]
; CHECK: backedge:
; CHECK-NEXT: call void @side_effect()
Expand Down Expand Up @@ -429,7 +429,7 @@ define void @many_exits([100 x i64] %len) {
; CHECK-NEXT: br label [[BACKEDGE]]
; CHECK: backedge:
; CHECK-NEXT: call void @side_effect()
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i64 [[IV]], 999
; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i64 [[IV]], 999
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
Expand Down Expand Up @@ -671,7 +671,7 @@ define i32 @exit_cond_depends_on_inner_loop() {
; CHECK-NEXT: br i1 [[OUTER_COND_1]], label [[EXIT:%.*]], label [[OUTER_LATCH]]
; CHECK: outer.latch:
; CHECK-NEXT: [[IV_OUTER_NEXT]] = add nuw nsw i32 [[IV_OUTER]], 1
; CHECK-NEXT: [[OUTER_COND_2:%.*]] = icmp ult i32 [[IV_OUTER]], 100
; CHECK-NEXT: [[OUTER_COND_2:%.*]] = icmp samesign ult i32 [[IV_OUTER]], 100
; CHECK-NEXT: br i1 [[OUTER_COND_2]], label [[OUTER_HEADER]], label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[X_RES:%.*]] = phi i32 [ [[X_LCSSA]], [[OUTER_EXITING_1]] ], [ -1, [[OUTER_LATCH]] ]
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/IndVarSimplify/exit_value_tests.ll
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Expand Up @@ -201,7 +201,7 @@ define i32 @neg_unroll_phi_select_constant_nonzero(i32 %arg) {
; CHECK-NEXT: [[SELECTOR:%.*]] = phi i32 [ [[ARG:%.*]], [[ENTRY]] ], [ [[F:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[F]] = call i32 @f()
; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[I]], 4
; CHECK-NEXT: [[C:%.*]] = icmp samesign ult i32 [[I]], 4
; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[LOOPEXIT:%.*]]
; CHECK: loopexit:
; CHECK-NEXT: [[SELECTOR_LCSSA:%.*]] = phi i32 [ [[SELECTOR]], [[LOOP]] ]
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/Transforms/IndVarSimplify/floating-point-small-iv.ll
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Expand Up @@ -13,7 +13,7 @@ define void @sitofp_fptosi_range() {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IDXPROM]]
; CHECK-NEXT: store i32 [[IV_INT]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[DEC_INT]] = add nsw i32 [[IV_INT]], -1
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC_INT]], 0
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[DEC_INT]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]]
; CHECK: cleanup:
; CHECK-NEXT: ret void
Expand Down Expand Up @@ -49,7 +49,7 @@ define void @sitofp_fptosi_range_overflow() {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IDXPROM]]
; CHECK-NEXT: store i32 [[CONV]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[DEC_INT]] = add nsw i32 [[IV_INT]], -1
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC_INT]], 0
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[DEC_INT]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]]
; CHECK: cleanup:
; CHECK-NEXT: ret void
Expand Down Expand Up @@ -84,7 +84,7 @@ define void @sitofp_fptosi_range_trunc() {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IV_INT]]
; CHECK-NEXT: store i32 [[IV_INT_TRUNC]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[DEC_INT]] = add nsw i64 [[IV_INT]], -1
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[DEC_INT]], 0
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i64 [[DEC_INT]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]]
; CHECK: cleanup:
; CHECK-NEXT: ret void
Expand Down Expand Up @@ -155,7 +155,7 @@ define void @sitofp_fptoui_range_zext() {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IV_INT_ZEXT]]
; CHECK-NEXT: store i32 [[IV_INT_ZEXT1]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[DEC_INT]] = add nsw i16 [[IV_INT]], -1
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i16 [[DEC_INT]], 0
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i16 [[DEC_INT]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]]
; CHECK: cleanup:
; CHECK-NEXT: ret void
Expand Down Expand Up @@ -191,7 +191,7 @@ define void @sitofp_fptoui_range_zext_postinc() {
; CHECK-NEXT: [[INC_INT_ZEXT:%.*]] = zext i16 [[INC_INT]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[INC_INT_ZEXT]]
; CHECK-NEXT: store i32 [[INC_INT_ZEXT1]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i16 [[INC_INT]], 200
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i16 [[INC_INT]], 200
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]]
; CHECK: cleanup:
; CHECK-NEXT: ret void
Expand Down Expand Up @@ -227,7 +227,7 @@ define void @uitofp_fptosi_range_zext() {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IV_INT_ZEXT]]
; CHECK-NEXT: store i32 [[IV_INT_ZEXT1]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[INC_INT]] = add nuw nsw i16 [[IV_INT]], 2
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i16 [[INC_INT]], 200
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i16 [[INC_INT]], 200
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]]
; CHECK: cleanup:
; CHECK-NEXT: ret void
Expand Down Expand Up @@ -329,7 +329,7 @@ define void @uitofp_fptoui_range () {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IDXPROM]]
; CHECK-NEXT: store i32 [[IV_INT]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[DEC_INT]] = add nsw i32 [[IV_INT]], -1
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC_INT]], 3
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[DEC_INT]], 3
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]]
; CHECK: cleanup:
; CHECK-NEXT: ret void
Expand Down Expand Up @@ -390,7 +390,7 @@ define void @uitofp_fptosi_range () {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IDXPROM]]
; CHECK-NEXT: store i32 [[IV_INT]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[DEC_INT]] = add nsw i32 [[IV_INT]], -1
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC_INT]], 3
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[DEC_INT]], 3
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]]
; CHECK: cleanup:
; CHECK-NEXT: ret void
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/IndVarSimplify/invalidate-modified-lcssa-phi.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -133,7 +133,7 @@ define i16 @test_pr58515_invalidate_loop_disposition(ptr %a) {
; CHECK-NEXT: [[SUM:%.*]] = phi i16 [ 0, [[ENTRY]] ], [ [[SUM_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[SUM_NEXT]] = add i16 [[SEL]], [[SUM]]
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i16 [[IV]], 1
; CHECK-NEXT: [[C_2:%.*]] = icmp ult i16 [[IV]], 9
; CHECK-NEXT: [[C_2:%.*]] = icmp samesign ult i16 [[IV]], 9
; CHECK-NEXT: br i1 [[C_2]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: [[LCSSA:%.*]] = phi i16 [ [[SUM_NEXT]], [[LOOP]] ]
Expand Down
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