DAG: Use RuntimeLibcalls to legalize vector frem calls #170719
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This continues the replacement of TargetLibraryInfo uses in codegen with RuntimeLibcallsInfo started in 821d282. The series there handled all of the multiple result calls. This extends for the other handled case, which happened to be frem. For some reason the Libcall for these are prefixed with "REM_", for the instruction "frem", which maps to the libcall "fmod".
This was referenced Dec 4, 2025
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@llvm/pr-subscribers-llvm-transforms @llvm/pr-subscribers-llvm-selectiondag Author: Matt Arsenault (arsenm) ChangesThis continues the replacement of TargetLibraryInfo uses in codegen For some reason the Libcall for these are prefixed with "REM_", for Patch is 26.96 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/170719.diff 7 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h b/llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
index dda0899f11337..cc71c3206410a 100644
--- a/llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
+++ b/llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
@@ -132,6 +132,10 @@ LLVM_ABI Libcall getSINCOS_STRET(EVT RetVT);
/// UNKNOWN_LIBCALL if there is none.
LLVM_ABI Libcall getMODF(EVT VT);
+/// \return the REM_* value for the given types, or UNKNOWN_LIBCALL if there is
+/// none.
+LLVM_ABI Libcall getREM(EVT VT);
+
/// \return the LROUND_* value for the given types, or UNKNOWN_LIBCALL if there
/// is none.
LLVM_ABI Libcall getLROUND(EVT VT);
diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.td b/llvm/include/llvm/IR/RuntimeLibcalls.td
index 09e33d7f89e8a..426fd7144257b 100644
--- a/llvm/include/llvm/IR/RuntimeLibcalls.td
+++ b/llvm/include/llvm/IR/RuntimeLibcalls.td
@@ -227,7 +227,7 @@ foreach S = !listconcat(F32VectorSuffixes, F64VectorSuffixes) in {
def FMA_#S : RuntimeLibcall;
def FMAX_#S : RuntimeLibcall;
def FMIN_#S : RuntimeLibcall;
- def FMOD_#S : RuntimeLibcall;
+ def REM_#S : RuntimeLibcall; // "fmod"
def HYPOT_#S : RuntimeLibcall;
def ILOGB_#S : RuntimeLibcall;
def LDEXP_#S : RuntimeLibcall;
@@ -3915,7 +3915,7 @@ defset list<RuntimeLibcallImpl> SLEEFGNUABI_VF2_VECFUNCS = {
def _ZGVnN2vv_fdim : RuntimeLibcallImpl<FDIM_V2F64>;
def _ZGVnN2vv_fmax : RuntimeLibcallImpl<FMAX_V2F64>;
def _ZGVnN2vv_fmin : RuntimeLibcallImpl<FMIN_V2F64>;
- def _ZGVnN2vv_fmod : RuntimeLibcallImpl<FMOD_V2F64>;
+ def _ZGVnN2vv_fmod : RuntimeLibcallImpl<REM_V2F64>;
def _ZGVnN2vv_hypot : RuntimeLibcallImpl<HYPOT_V2F64>;
def _ZGVnN2vv_ldexp : RuntimeLibcallImpl<LDEXP_V2F64>;
def _ZGVnN2vv_nextafter : RuntimeLibcallImpl<NEXTAFTER_V2F64>;
@@ -3961,7 +3961,7 @@ defset list<RuntimeLibcallImpl> SLEEFGNUABI_VF4_VECFUNCS = {
def _ZGVnN4vv_fdimf : RuntimeLibcallImpl<FDIM_V4F32>;
def _ZGVnN4vv_fmaxf : RuntimeLibcallImpl<FMAX_V4F32>;
def _ZGVnN4vv_fminf : RuntimeLibcallImpl<FMIN_V4F32>;
- def _ZGVnN4vv_fmodf : RuntimeLibcallImpl<FMOD_V4F32>;
+ def _ZGVnN4vv_fmodf : RuntimeLibcallImpl<REM_V4F32>;
def _ZGVnN4vv_hypotf : RuntimeLibcallImpl<HYPOT_V4F32>;
def _ZGVnN4vv_ldexpf : RuntimeLibcallImpl<LDEXP_V4F32>;
def _ZGVnN4vv_nextafterf : RuntimeLibcallImpl<NEXTAFTER_V4F32>;
@@ -4038,8 +4038,8 @@ defset list<RuntimeLibcallImpl> SLEEFGNUABI_SCALABLE_VECFUNCS = {
def _ZGVsMxvv_fmaxf : RuntimeLibcallImpl<FMAX_NXV4F32>;
def _ZGVsMxvv_fmin : RuntimeLibcallImpl<FMIN_NXV2F64>;
def _ZGVsMxvv_fminf : RuntimeLibcallImpl<FMIN_NXV4F32>;
- def _ZGVsMxvv_fmod : RuntimeLibcallImpl<FMOD_NXV2F64>;
- def _ZGVsMxvv_fmodf : RuntimeLibcallImpl<FMOD_NXV4F32>;
+ def _ZGVsMxvv_fmod : RuntimeLibcallImpl<REM_NXV2F64>;
+ def _ZGVsMxvv_fmodf : RuntimeLibcallImpl<REM_NXV4F32>;
def _ZGVsMxvv_hypot : RuntimeLibcallImpl<HYPOT_NXV2F64>;
def _ZGVsMxvv_hypotf : RuntimeLibcallImpl<HYPOT_NXV4F32>;
def _ZGVsMxvv_ldexp : RuntimeLibcallImpl<LDEXP_NXV2F64>;
@@ -4103,8 +4103,8 @@ defset list<RuntimeLibcallImpl> SLEEFGNUABI_SCALABLE_VECFUNCS_RISCV = {
def Sleef_fmaxfx_rvvm2 : RuntimeLibcallImpl<FMAX_NXV4F32>;
def Sleef_fmindx_u10rvvm2 : RuntimeLibcallImpl<FMIN_NXV2F64>;
def Sleef_fminfx_u10rvvm2 : RuntimeLibcallImpl<FMIN_NXV4F32>;
- def Sleef_fmoddx_rvvm2 : RuntimeLibcallImpl<FMOD_NXV2F64>;
- def Sleef_fmodfx_rvvm2 : RuntimeLibcallImpl<FMOD_NXV4F32>;
+ def Sleef_fmoddx_rvvm2 : RuntimeLibcallImpl<REM_NXV2F64>;
+ def Sleef_fmodfx_rvvm2 : RuntimeLibcallImpl<REM_NXV4F32>;
def Sleef_hypotdx_u05rvvm2 : RuntimeLibcallImpl<HYPOT_NXV2F64>;
def Sleef_hypotfx_u05rvvm2 : RuntimeLibcallImpl<HYPOT_NXV4F32>;
def Sleef_ilogbdx_rvvm2 : RuntimeLibcallImpl<ILOGB_NXV2F64>;
@@ -4196,8 +4196,8 @@ defset list<RuntimeLibcallImpl> ARMPL_VECFUNCS = {
def armpl_svfmax_f64_x : RuntimeLibcallImpl<FMAX_NXV2F64>;
def armpl_svfmin_f32_x : RuntimeLibcallImpl<FMIN_NXV4F32>;
def armpl_svfmin_f64_x : RuntimeLibcallImpl<FMIN_NXV2F64>;
- def armpl_svfmod_f32_x : RuntimeLibcallImpl<FMOD_NXV4F32>;
- def armpl_svfmod_f64_x : RuntimeLibcallImpl<FMOD_NXV2F64>;
+ def armpl_svfmod_f32_x : RuntimeLibcallImpl<REM_NXV4F32>;
+ def armpl_svfmod_f64_x : RuntimeLibcallImpl<REM_NXV2F64>;
def armpl_svhypot_f32_x : RuntimeLibcallImpl<HYPOT_NXV4F32>;
def armpl_svhypot_f64_x : RuntimeLibcallImpl<HYPOT_NXV2F64>;
def armpl_svilogb_f32_x : RuntimeLibcallImpl<ILOGB_NXV4F32>;
@@ -4282,8 +4282,8 @@ defset list<RuntimeLibcallImpl> ARMPL_VECFUNCS = {
def armpl_vfmaxq_f64 : RuntimeLibcallImpl<FMAX_V2F64>;
def armpl_vfminq_f32 : RuntimeLibcallImpl<FMIN_V4F32>;
def armpl_vfminq_f64 : RuntimeLibcallImpl<FMIN_V2F64>;
- def armpl_vfmodq_f32 : RuntimeLibcallImpl<FMOD_V4F32>;
- def armpl_vfmodq_f64 : RuntimeLibcallImpl<FMOD_V2F64>;
+ def armpl_vfmodq_f32 : RuntimeLibcallImpl<REM_V4F32>;
+ def armpl_vfmodq_f64 : RuntimeLibcallImpl<REM_V2F64>;
def armpl_vhypotq_f32 : RuntimeLibcallImpl<HYPOT_V4F32>;
def armpl_vhypotq_f64 : RuntimeLibcallImpl<HYPOT_V2F64>;
def armpl_vilogbq_f32 : RuntimeLibcallImpl<ILOGB_V4F32>;
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index e8d9bce43f6ea..b34928c8e6950 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -157,11 +157,6 @@ class VectorLegalizer {
bool tryExpandVecMathCall(SDNode *Node, RTLIB::Libcall LC,
SmallVectorImpl<SDValue> &Results);
- bool tryExpandVecMathCall(SDNode *Node, RTLIB::Libcall Call_F32,
- RTLIB::Libcall Call_F64, RTLIB::Libcall Call_F80,
- RTLIB::Libcall Call_F128,
- RTLIB::Libcall Call_PPCF128,
- SmallVectorImpl<SDValue> &Results);
void UnrollStrictFPOp(SDNode *Node, SmallVectorImpl<SDValue> &Results);
@@ -1261,13 +1256,13 @@ void VectorLegalizer::Expand(SDNode *Node, SmallVectorImpl<SDValue> &Results) {
return;
}
break;
- case ISD::FREM:
- if (tryExpandVecMathCall(Node, RTLIB::REM_F32, RTLIB::REM_F64,
- RTLIB::REM_F80, RTLIB::REM_F128,
- RTLIB::REM_PPCF128, Results))
+ case ISD::FREM: {
+ RTLIB::Libcall LC = RTLIB::getREM(Node->getValueType(0));
+ if (tryExpandVecMathCall(Node, LC, Results))
return;
break;
+ }
case ISD::FSINCOS:
case ISD::FSINCOSPI: {
EVT VT = Node->getValueType(0);
@@ -2233,99 +2228,60 @@ bool VectorLegalizer::tryExpandVecMathCall(SDNode *Node, RTLIB::Libcall LC,
// converted to their none strict counterpart.
assert(!Node->isStrictFPOpcode() && "Unexpected strict fp operation!");
- const char *LCName = TLI.getLibcallName(LC);
- if (!LCName)
+ RTLIB::LibcallImpl LCImpl = TLI.getLibcallImpl(LC);
+ if (LCImpl == RTLIB::Unsupported)
return false;
- LLVM_DEBUG(dbgs() << "Looking for vector variant of " << LCName << "\n");
EVT VT = Node->getValueType(0);
- ElementCount VL = VT.getVectorElementCount();
-
- // Lookup a vector function equivalent to the specified libcall. Prefer
- // unmasked variants but we will generate a mask if need be.
- const TargetLibraryInfo &TLibInfo = DAG.getLibInfo();
- const VecDesc *VD = TLibInfo.getVectorMappingInfo(LCName, VL, false);
- if (!VD)
- VD = TLibInfo.getVectorMappingInfo(LCName, VL, /*Masked=*/true);
- if (!VD)
- return false;
-
- LLVMContext *Ctx = DAG.getContext();
- Type *Ty = VT.getTypeForEVT(*Ctx);
- Type *ScalarTy = Ty->getScalarType();
+ const RTLIB::RuntimeLibcallsInfo &RTLCI = TLI.getRuntimeLibcallsInfo();
+ LLVMContext &Ctx = *DAG.getContext();
- // Construct a scalar function type based on Node's operands.
- SmallVector<Type *, 8> ArgTys;
- for (unsigned i = 0; i < Node->getNumOperands(); ++i) {
- assert(Node->getOperand(i).getValueType() == VT &&
- "Expected matching vector types!");
- ArgTys.push_back(ScalarTy);
- }
- FunctionType *ScalarFTy = FunctionType::get(ScalarTy, ArgTys, false);
+ auto [FuncTy, FuncAttrs] = RTLCI.getFunctionTy(
+ Ctx, DAG.getSubtarget().getTargetTriple(), DAG.getDataLayout(), LCImpl);
- // Generate call information for the vector function.
- const std::string MangledName = VD->getVectorFunctionABIVariantString();
- auto OptVFInfo = VFABI::tryDemangleForVFABI(MangledName, ScalarFTy);
- if (!OptVFInfo)
- return false;
+ SDLoc DL(Node);
+ TargetLowering::ArgListTy Args;
- LLVM_DEBUG(dbgs() << "Found vector variant " << VD->getVectorFnName()
- << "\n");
+ bool HasMaskArg = RTLCI.hasVectorMaskArgument(LCImpl);
- // Sanity check just in case OptVFInfo has unexpected parameters.
- if (OptVFInfo->Shape.Parameters.size() !=
- Node->getNumOperands() + VD->isMasked())
- return false;
+ // Sanity check just in case function has unexpected parameters.
+ assert(FuncTy->getNumParams() == Node->getNumOperands() + HasMaskArg &&
+ EVT::getEVT(FuncTy->getReturnType(), true) == VT &&
+ "mismatch in value type and call signature type");
- // Collect vector call operands.
+ for (unsigned I = 0, E = FuncTy->getNumParams(); I != E; ++I) {
+ Type *ParamTy = FuncTy->getParamType(I);
- SDLoc DL(Node);
- TargetLowering::ArgListTy Args;
-
- unsigned OpNum = 0;
- for (auto &VFParam : OptVFInfo->Shape.Parameters) {
- if (VFParam.ParamKind == VFParamKind::GlobalPredicate) {
- EVT MaskVT = TLI.getSetCCResultType(DAG.getDataLayout(), *Ctx, VT);
+ if (HasMaskArg && I == E - 1) {
+ assert(cast<VectorType>(ParamTy)->getElementType()->isIntegerTy(1) &&
+ "unexpected vector mask type");
+ EVT MaskVT = TLI.getSetCCResultType(DAG.getDataLayout(), Ctx, VT);
Args.emplace_back(DAG.getBoolConstant(true, DL, MaskVT, VT),
- MaskVT.getTypeForEVT(*Ctx));
- continue;
- }
-
- // Only vector operands are supported.
- if (VFParam.ParamKind != VFParamKind::Vector)
- return false;
+ MaskVT.getTypeForEVT(Ctx));
- Args.emplace_back(Node->getOperand(OpNum++), Ty);
+ } else {
+ SDValue Op = Node->getOperand(I);
+ assert(Op.getValueType() == EVT::getEVT(ParamTy, true) &&
+ "mismatch in value type and call argument type");
+ Args.emplace_back(Op, ParamTy);
+ }
}
// Emit a call to the vector function.
- SDValue Callee = DAG.getExternalSymbol(VD->getVectorFnName().data(),
- TLI.getPointerTy(DAG.getDataLayout()));
+ SDValue Callee =
+ DAG.getExternalSymbol(LCImpl, TLI.getPointerTy(DAG.getDataLayout()));
+ CallingConv::ID CC = RTLCI.getLibcallImplCallingConv(LCImpl);
+
TargetLowering::CallLoweringInfo CLI(DAG);
CLI.setDebugLoc(DL)
.setChain(DAG.getEntryNode())
- .setLibCallee(CallingConv::C, Ty, Callee, std::move(Args));
+ .setLibCallee(CC, FuncTy->getReturnType(), Callee, std::move(Args));
std::pair<SDValue, SDValue> CallResult = TLI.LowerCallTo(CLI);
Results.push_back(CallResult.first);
return true;
}
-/// Try to expand the node to a vector libcall based on the result type.
-bool VectorLegalizer::tryExpandVecMathCall(
- SDNode *Node, RTLIB::Libcall Call_F32, RTLIB::Libcall Call_F64,
- RTLIB::Libcall Call_F80, RTLIB::Libcall Call_F128,
- RTLIB::Libcall Call_PPCF128, SmallVectorImpl<SDValue> &Results) {
- RTLIB::Libcall LC = RTLIB::getFPLibCall(
- Node->getValueType(0).getVectorElementType(), Call_F32, Call_F64,
- Call_F80, Call_F128, Call_PPCF128);
-
- if (LC == RTLIB::UNKNOWN_LIBCALL)
- return false;
-
- return tryExpandVecMathCall(Node, LC, Results);
-}
-
void VectorLegalizer::UnrollStrictFPOp(SDNode *Node,
SmallVectorImpl<SDValue> &Results) {
EVT VT = Node->getValueType(0);
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 0e6f03e13a2af..66f03f9f5d95a 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -593,6 +593,28 @@ RTLIB::Libcall RTLIB::getSINCOS_STRET(EVT RetVT) {
UNKNOWN_LIBCALL, UNKNOWN_LIBCALL, UNKNOWN_LIBCALL);
}
+RTLIB::Libcall RTLIB::getREM(EVT VT) {
+ // TODO: Tablegen should generate this function
+ if (VT.isVector()) {
+ if (!VT.isSimple())
+ return RTLIB::UNKNOWN_LIBCALL;
+ switch (VT.getSimpleVT().SimpleTy) {
+ case MVT::v4f32:
+ return RTLIB::REM_V4F32;
+ case MVT::v2f64:
+ return RTLIB::REM_V2F64;
+ case MVT::nxv4f32:
+ return RTLIB::REM_NXV4F32;
+ case MVT::nxv2f64:
+ return RTLIB::REM_NXV2F64;
+ default:
+ return RTLIB::UNKNOWN_LIBCALL;
+ }
+ }
+
+ return getFPLibCall(VT, REM_F32, REM_F64, REM_F80, REM_F128, REM_PPCF128);
+}
+
RTLIB::Libcall RTLIB::getMODF(EVT RetVT) {
// TODO: Tablegen should generate this function
if (RetVT.isVector()) {
diff --git a/llvm/lib/IR/RuntimeLibcalls.cpp b/llvm/lib/IR/RuntimeLibcalls.cpp
index a5f842a5fb520..63da006fe5ca8 100644
--- a/llvm/lib/IR/RuntimeLibcalls.cpp
+++ b/llvm/lib/IR/RuntimeLibcalls.cpp
@@ -44,7 +44,9 @@ RuntimeLibcallsInfo::RuntimeLibcallsInfo(const Triple &TT,
switch (VecLib) {
case VectorLibrary::SLEEFGNUABI:
for (RTLIB::LibcallImpl Impl :
- {RTLIB::impl__ZGVnN2vl8_modf, RTLIB::impl__ZGVnN4vl4_modff,
+ {RTLIB::impl__ZGVnN2vv_fmod, RTLIB::impl__ZGVnN4vv_fmodf,
+ RTLIB::impl__ZGVsMxvv_fmod, RTLIB::impl__ZGVsMxvv_fmodf,
+ RTLIB::impl__ZGVnN2vl8_modf, RTLIB::impl__ZGVnN4vl4_modff,
RTLIB::impl__ZGVsNxvl8_modf, RTLIB::impl__ZGVsNxvl4_modff,
RTLIB::impl__ZGVnN2vl8l8_sincos, RTLIB::impl__ZGVnN4vl4l4_sincosf,
RTLIB::impl__ZGVsNxvl8l8_sincos, RTLIB::impl__ZGVsNxvl4l4_sincosf,
@@ -55,7 +57,9 @@ RuntimeLibcallsInfo::RuntimeLibcallsInfo(const Triple &TT,
break;
case VectorLibrary::ArmPL:
for (RTLIB::LibcallImpl Impl :
- {RTLIB::impl_armpl_vmodfq_f64, RTLIB::impl_armpl_vmodfq_f32,
+ {RTLIB::impl_armpl_svfmod_f32_x, RTLIB::impl_armpl_svfmod_f64_x,
+ RTLIB::impl_armpl_vfmodq_f32, RTLIB::impl_armpl_vfmodq_f64,
+ RTLIB::impl_armpl_vmodfq_f64, RTLIB::impl_armpl_vmodfq_f32,
RTLIB::impl_armpl_svmodf_f64_x, RTLIB::impl_armpl_svmodf_f32_x,
RTLIB::impl_armpl_vsincosq_f64, RTLIB::impl_armpl_vsincosq_f32,
RTLIB::impl_armpl_svsincos_f64_x, RTLIB::impl_armpl_svsincos_f32_x,
@@ -65,9 +69,9 @@ RuntimeLibcallsInfo::RuntimeLibcallsInfo(const Triple &TT,
setAvailable(Impl);
for (RTLIB::LibcallImpl Impl :
- {RTLIB::impl_armpl_vsincosq_f64, RTLIB::impl_armpl_vsincosq_f32})
+ {RTLIB::impl_armpl_vfmodq_f32, RTLIB::impl_armpl_vfmodq_f64,
+ RTLIB::impl_armpl_vsincosq_f64, RTLIB::impl_armpl_vsincosq_f32})
setLibcallImplCallingConv(Impl, CallingConv::AArch64_VectorCall);
-
break;
default:
break;
@@ -277,6 +281,43 @@ RuntimeLibcallsInfo::getFunctionTy(LLVMContext &Ctx, const Triple &TT,
fcNegNormal));
return {FuncTy, Attrs};
}
+ case RTLIB::impl__ZGVnN2vv_fmod:
+ case RTLIB::impl__ZGVnN4vv_fmodf:
+ case RTLIB::impl__ZGVsMxvv_fmod:
+ case RTLIB::impl__ZGVsMxvv_fmodf:
+ case RTLIB::impl_armpl_vfmodq_f32:
+ case RTLIB::impl_armpl_vfmodq_f64:
+ case RTLIB::impl_armpl_svfmod_f32_x:
+ case RTLIB::impl_armpl_svfmod_f64_x: {
+ bool IsF32 = LibcallImpl == RTLIB::impl__ZGVnN4vv_fmodf ||
+ LibcallImpl == RTLIB::impl__ZGVsMxvv_fmodf ||
+ LibcallImpl == RTLIB::impl_armpl_svfmod_f32_x ||
+ LibcallImpl == RTLIB::impl_armpl_vfmodq_f32;
+
+ bool IsScalable = LibcallImpl == RTLIB::impl__ZGVsMxvv_fmod ||
+ LibcallImpl == RTLIB::impl__ZGVsMxvv_fmodf ||
+ LibcallImpl == RTLIB::impl_armpl_svfmod_f32_x ||
+ LibcallImpl == RTLIB::impl_armpl_svfmod_f64_x;
+
+ AttrBuilder FuncAttrBuilder(Ctx);
+
+ for (Attribute::AttrKind Attr : CommonFnAttrs)
+ FuncAttrBuilder.addAttribute(Attr);
+
+ AttributeList Attrs;
+ Attrs = Attrs.addFnAttributes(Ctx, FuncAttrBuilder);
+
+ Type *ScalarTy = IsF32 ? Type::getFloatTy(Ctx) : Type::getDoubleTy(Ctx);
+ unsigned EC = IsF32 ? 4 : 2;
+ VectorType *VecTy = VectorType::get(ScalarTy, EC, IsScalable);
+
+ SmallVector<Type *, 3> ArgTys = {VecTy, VecTy};
+ if (hasVectorMaskArgument(LibcallImpl))
+ ArgTys.push_back(VectorType::get(Type::getInt1Ty(Ctx), EC, IsScalable));
+
+ FunctionType *FuncTy = FunctionType::get(VecTy, ArgTys, false);
+ return {FuncTy, Attrs};
+ }
case RTLIB::impl__ZGVnN2vl8_modf:
case RTLIB::impl__ZGVnN4vl4_modff:
case RTLIB::impl__ZGVsNxvl8_modf:
@@ -397,12 +438,16 @@ bool RuntimeLibcallsInfo::hasVectorMaskArgument(RTLIB::LibcallImpl Impl) {
/// FIXME: This should be generated by tablegen and support the argument at an
/// arbitrary position
switch (Impl) {
+ case RTLIB::impl_armpl_svfmod_f32_x:
+ case RTLIB::impl_armpl_svfmod_f64_x:
case RTLIB::impl_armpl_svmodf_f64_x:
case RTLIB::impl_armpl_svmodf_f32_x:
case RTLIB::impl_armpl_svsincos_f32_x:
case RTLIB::impl_armpl_svsincos_f64_x:
case RTLIB::impl_armpl_svsincospi_f32_x:
case RTLIB::impl_armpl_svsincospi_f64_x:
+ case RTLIB::impl__ZGVsMxvv_fmod:
+ case RTLIB::impl__ZGVsMxvv_fmodf:
return true;
default:
return false;
diff --git a/llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll b/llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
index c40cdf803474e..7fa1be32994b2 100644
--- a/llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
+++ b/llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
@@ -1,29 +1,38 @@
; REQUIRES: aarch64-registered-target
; RUN: opt -S -passes=declare-runtime-libcalls -mtriple=aarch64-unknown-linux -mattr=+neon,+sve -vector-library=ArmPL < %s | FileCheck %s
-; CHECK: declare <vscale x 4 x float> @armpl_svmodf_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS:#[0-9]+]]
+; CHECK: declare <vscale x 4 x float> @armpl_svfmod_f32_x(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS:#[0-9]+]]
-; CHECK: declare <vscale x 2 x double> @armpl_svmodf_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS]]
+; CHECK: declare <vscale x 2 x double> @armpl_svfmod_f64_x(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
-; CHECK: declare void @armpl_svsincos_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS:#[0-9]+]]
+; CHECK: declare <vscale x 4 x float> @armpl_svmodf_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS_PTR_ARG:#[0-9]+]]
-; CHECK: declare void @armpl_svsincos_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS]]
+; CHECK: declare <vscale x 2 x double> @armpl_svmodf_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS_PTR_ARG]]
-; CHECK: declare void @armpl_svsincospi_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS]]
+; CHECK: declare void @armpl_svsincos_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS_PTR_ARG]]
-; CHECK: declare void @armpl_svsincospi_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS]]
+; CHECK: declare void @armpl_svsincos_f64_x(<vscale x 2 x double>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 2 x i1>) [[ATTRS_PTR_ARG]]
-; CHECK: declare <4 x float> @armpl_vmodfq_f32(<4 x float>, ptr noalias nonnull writeonly align 16) [[ATTRS]]
+; CHECK: declare void @armpl_svsincospi_f32_x(<vscale x 4 x float>, ptr noalias nonnull writeonly align 16, ptr noalias nonnull writeonly align 16, <vscale x 4 x i1>) [[ATTRS_PTR_ARG]]
-; CHECK: declare <2 x double> @armpl_vmodfq_f64(<2 x double>, ptr noalias nonnull writeonly align 16) [[ATTRS]]...
[truncated]
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This continues the replacement of TargetLibraryInfo uses in codegen
with RuntimeLibcallsInfo started in 821d282.
The series there handled all of the multiple result calls. This
extends for the other handled case, which happened to be frem.
For some reason the Libcall for these are prefixed with "REM_", for
the instruction "frem", which maps to the libcall "fmod".