Include inline_strlen.h on aarch64 only if the target has vector instrucions

[Sterling-Augustine]

No description provided.

[llvmbot]

@llvm/pr-subscribers-libc

Author: None (Sterling-Augustine)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/170892.diff

1 Files Affected:

• (modified) libc/src/string/string_length.h (+1-1)

diff --git a/libc/src/string/string_length.h b/libc/src/string/string_length.h
index c828c85c16a17..1dc59d0078079 100644
--- a/libc/src/string/string_length.h
+++ b/libc/src/string/string_length.h
@@ -24,7 +24,7 @@
 #endif
 #if defined(LIBC_TARGET_ARCH_IS_X86)
 #include "src/string/memory_utils/x86_64/inline_strlen.h"
-#elif defined(LIBC_TARGET_ARCH_IS_AARCH64)
+#elif defined(LIBC_TARGET_ARCH_IS_AARCH64) && (defined(LIBC_TARGET_CPU_HAS_SVE) || defined(__ARM_NEON))
 #include "src/string/memory_utils/aarch64/inline_strlen.h"
 #endif
 

[github-actions]

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[SchrodingerZhu]

Isn't neon a mandatory part of the aarch64 ISA?

[Sterling-Augustine]

Isn't neon a mandatory part of the aarch64 ISA?

I had thought so, but a comment on #170738 seems to imply that cpus without it exist out in the world.

[SchrodingerZhu]

well, yeah, I guess there are some vendors making CPUs for very specialized purposes.

[statham-arm]

Isn't neon a mandatory part of the aarch64 ISA?

The R profile of AArch64 in particular permits floating-point support to be omitted. §A1.5 says "This option is licensed only for implementations targeting specialized markets", but it's not completely forbidden.

Thanks for the quick fix! Sorry I was in the wrong timezone to help review it.