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[CodeGen] Use getObjectPtrOffset to generate loads/stores for mem intrinsics #80184

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Merged
merged 14 commits into from
Oct 14, 2025
Merged

[CodeGen] Use getObjectPtrOffset to generate loads/stores for mem intrinsics #80184

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8fce40a
Use getObjectPtrOffset to generate constant offsets for memcpy/memset
dschuff Jan 31, 2024
6e09932
remove debug prints, reformat
dschuff Jan 31, 2024
108e14a
autogenerate test expectation
dschuff Jan 31, 2024
1f0d980
fix test invocation
dschuff Jan 31, 2024
99eddb8
fix format
dschuff Jan 31, 2024
120ac5a
mark all loads and stores as dereferenceable
dschuff Feb 6, 2024
069523a
Merge branch 'main' into memset_offset
dschuff Feb 6, 2024
7661fdd
Merge branch 'main' into memset_offset
dschuff Oct 9, 2025
f24da0c
update tests
dschuff Oct 11, 2025
c5eae8c
update more tests
dschuff Oct 11, 2025
951232e
Back out dereferenceable(), just use getObjectPtrOffset
dschuff Oct 13, 2025
2bbf2e1
clang-format
dschuff Oct 13, 2025
1c55043
add comment explaining the test's purpose
dschuff Oct 13, 2025
eec7c5f
Merge branch 'main' into memset_offset
dschuff Oct 13, 2025
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16 changes: 8 additions & 8 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -8783,7 +8783,7 @@ static SDValue getMemcpyLoadsAndStores(
if (Value.getNode()) {
Store = DAG.getStore(
Chain, dl, Value,
DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl),
DAG.getObjectPtrOffset(dl, Dst, TypeSize::getFixed(DstOff)),
DstPtrInfo.getWithOffset(DstOff), Alignment, MMOFlags, NewAAInfo);
OutChains.push_back(Store);
}
Expand All @@ -8799,7 +8799,7 @@ static SDValue getMemcpyLoadsAndStores(
assert(NVT.bitsGE(VT));

bool isDereferenceable =
SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
MachineMemOperand::Flags SrcMMOFlags = MMOFlags;
if (isDereferenceable)
SrcMMOFlags |= MachineMemOperand::MODereferenceable;
Expand All @@ -8808,14 +8808,14 @@ static SDValue getMemcpyLoadsAndStores(

Value = DAG.getExtLoad(
ISD::EXTLOAD, dl, NVT, Chain,
DAG.getMemBasePlusOffset(Src, TypeSize::getFixed(SrcOff), dl),
DAG.getObjectPtrOffset(dl, Src, TypeSize::getFixed(SrcOff)),
SrcPtrInfo.getWithOffset(SrcOff), VT,
commonAlignment(*SrcAlign, SrcOff), SrcMMOFlags, NewAAInfo);
OutLoadChains.push_back(Value.getValue(1));

Store = DAG.getTruncStore(
Chain, dl, Value,
DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl),
DAG.getObjectPtrOffset(dl, Dst, TypeSize::getFixed(DstOff)),
DstPtrInfo.getWithOffset(DstOff), VT, Alignment, MMOFlags, NewAAInfo);
OutStoreChains.push_back(Store);
}
Expand Down Expand Up @@ -8945,14 +8945,14 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
SDValue Value;

bool isDereferenceable =
SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
MachineMemOperand::Flags SrcMMOFlags = MMOFlags;
if (isDereferenceable)
SrcMMOFlags |= MachineMemOperand::MODereferenceable;

Value = DAG.getLoad(
VT, dl, Chain,
DAG.getMemBasePlusOffset(Src, TypeSize::getFixed(SrcOff), dl),
DAG.getObjectPtrOffset(dl, Src, TypeSize::getFixed(SrcOff)),
SrcPtrInfo.getWithOffset(SrcOff), *SrcAlign, SrcMMOFlags, NewAAInfo);
LoadValues.push_back(Value);
LoadChains.push_back(Value.getValue(1));
Expand All @@ -8967,7 +8967,7 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,

Store = DAG.getStore(
Chain, dl, LoadValues[i],
DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl),
DAG.getObjectPtrOffset(dl, Dst, TypeSize::getFixed(DstOff)),
DstPtrInfo.getWithOffset(DstOff), Alignment, MMOFlags, NewAAInfo);
OutChains.push_back(Store);
DstOff += VTSize;
Expand Down Expand Up @@ -9099,7 +9099,7 @@ static SDValue getMemsetStores(SelectionDAG &DAG, const SDLoc &dl,
assert(Value.getValueType() == VT && "Value with wrong type.");
SDValue Store = DAG.getStore(
Chain, dl, Value,
DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl),
DAG.getObjectPtrOffset(dl, Dst, TypeSize::getFixed(DstOff)),
DstPtrInfo.getWithOffset(DstOff), Alignment,
isVol ? MachineMemOperand::MOVolatile : MachineMemOperand::MONone,
NewAAInfo);
Expand Down
48 changes: 48 additions & 0 deletions llvm/test/CodeGen/WebAssembly/mem-intrinsics-offsets.ll
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Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mcpu=mvp -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s

; This test ensures that loads and stores generated for small memcpy et al use
; constant offset folding.


target triple = "wasm32-unknown-unknown"

define void @call_memset(ptr) #0 {
; CHECK-LABEL: call_memset:
; CHECK: .functype call_memset (i32) -> ()
; CHECK-NEXT: # %bb.0:
; CHECK-NEXT: i64.const $push0=, 0
; CHECK-NEXT: i64.store 8($0):p2align=0, $pop0
; CHECK-NEXT: i64.const $push1=, 0
; CHECK-NEXT: i64.store 0($0):p2align=0, $pop1
; CHECK-NEXT: # fallthrough-return
call void @llvm.memset.p0.i32(ptr align 1 %0, i8 0, i32 16, i1 false)
ret void
}

define void @call_memcpy(ptr %dst, ptr %src) #0 {
; CHECK-LABEL: call_memcpy:
; CHECK: .functype call_memcpy (i32, i32) -> ()
; CHECK-NEXT: # %bb.0:
; CHECK-NEXT: i64.load $push0=, 8($1):p2align=0
; CHECK-NEXT: i64.store 8($0):p2align=0, $pop0
; CHECK-NEXT: i64.load $push1=, 0($1):p2align=0
; CHECK-NEXT: i64.store 0($0):p2align=0, $pop1
; CHECK-NEXT: # fallthrough-return
call void @llvm.memcpy.p0.p0.i32(ptr align 1 %dst, ptr align 1 %src, i32 16, i1 false)
ret void
}


define void @call_memmove(ptr %dst, ptr %src) #0 {
; CHECK-LABEL: call_memmove:
; CHECK: .functype call_memmove (i32, i32) -> ()
; CHECK-NEXT: # %bb.0:
; CHECK-NEXT: i64.load $2=, 0($1):p2align=0
; CHECK-NEXT: i64.load $push0=, 8($1):p2align=0
; CHECK-NEXT: i64.store 8($0):p2align=0, $pop0
; CHECK-NEXT: i64.store 0($0):p2align=0, $2
; CHECK-NEXT: # fallthrough-return
call void @llvm.memmove.p0.p0.i32(ptr align 1 %dst, ptr align 1 %src, i32 16, i1 false)
ret void
}