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Reland "[AArch64] Decouple feature dependency expansion. (#94279)" #95519

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Merged
merged 6 commits into from
Jun 18, 2024
Merged

Reland "[AArch64] Decouple feature dependency expansion. (#94279)" #95519

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66b4dcd
Reland "[AArch64] Decouple feature dependency expansion. (#94279)"
labrinea Jun 14, 2024
442e4ee
Changes from last revision:
labrinea Jun 14, 2024
cf4dcdb
Changes from last revision:
labrinea Jun 14, 2024
a7d8363
Fix typo
labrinea Jun 14, 2024
6381f8d
Merge remote-tracking branch 'upstream/main' into parse-target-attribute
tmatheson-arm Jun 18, 2024
2ef457d
Changes from last revision:
labrinea Jun 18, 2024
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10 changes: 4 additions & 6 deletions clang/lib/AST/ASTContext.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -13725,12 +13725,10 @@ void ASTContext::getFunctionFeatureMap(llvm::StringMap<bool> &FeatureMap,

// Make a copy of the features as passed on the command line into the
// beginning of the additional features from the function to override.
// AArch64 handles command line option features in parseTargetAttr().
if (!Target->getTriple().isAArch64())
ParsedAttr.Features.insert(
ParsedAttr.Features.begin(),
Target->getTargetOpts().FeaturesAsWritten.begin(),
Target->getTargetOpts().FeaturesAsWritten.end());
ParsedAttr.Features.insert(
ParsedAttr.Features.begin(),
Target->getTargetOpts().FeaturesAsWritten.begin(),
Target->getTargetOpts().FeaturesAsWritten.end());

if (ParsedAttr.CPU != "" && Target->isValidCPUName(ParsedAttr.CPU))
TargetCPU = ParsedAttr.CPU;
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6 changes: 6 additions & 0 deletions clang/test/Sema/aarch64-neon-target.c
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@@ -1,4 +1,5 @@
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon -verify -emit-llvm -o - %s
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon -target-feature +outline-atomics -verify -emit-llvm -o - %s
// REQUIRES: aarch64-registered-target

// Test that functions with the correct target attributes can use the correct NEON intrinsics.
Expand Down Expand Up @@ -41,6 +42,11 @@ void bf16(uint32x2_t v2i32, uint32x4_t v4i32, uint16x8_t v8i16, uint8x16_t v16i8
vcvt_bf16_f32(v4f32);
}

__attribute__((target("arch=armv8-a")))
uint64x2_t test_v8(uint64x2_t a, uint64x2_t b) {
return veorq_u64(a, b);
}

__attribute__((target("arch=armv8.1-a")))
void test_v81(int32x2_t d, int32x4_t v, int s) {
vqrdmlahq_s32(v, v, v);
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