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nbdd0121jwnrt
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[multitop] port sleep_pin_mio_dio_val_test to darjeeling
Signed-off-by: Gary Guo <[email protected]>
1 parent 34e4424 commit 23db47c

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hw/top_darjeeling/dv/chip_sim_cfg.hjson

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@@ -492,7 +492,7 @@
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// {
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// name: chip_sw_sleep_pin_mio_dio_val
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// uvm_test_seq: chip_sw_sleep_pin_mio_dio_val_vseq
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// sw_images: ["//sw/device/tests/sim_dv:sleep_pin_mio_dio_val_test:6:new_rules"]
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// sw_images: ["//sw/device/tests:sleep_pin_mio_dio_val_test:6:new_rules"]
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// en_run_modes: ["sw_test_mode_test_rom"]
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// // Starting the chip in prod LC state frees up all MIOs for this test.
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// run_opts: ["+use_otp_image=OtpTypeLcStProd"]

sw/device/tests/BUILD

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@@ -7314,6 +7314,7 @@ opentitan_test(
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{
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"//hw/top_earlgrey:fpga_cw340_sival": None,
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"//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
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"//hw/top_darjeeling:sim_dv": None,
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},
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),
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fpga = fpga_params(

sw/device/tests/sleep_pin_mio_dio_val_test.c

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@@ -34,11 +34,18 @@ OTTF_DEFINE_TEST_CONFIG();
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* the expected and measured values.
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*/
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#if defined(OPENTITAN_IS_EARLGREY)
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enum { kNumOptOut = 2 };
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static const dt_pad_t kOptOut[] = {
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kDtPadSpiDeviceSck,
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kDtPadSpiDeviceCsb,
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};
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#elif defined(OPENTITAN_IS_DARJEELING)
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enum { kNumOptOut = 0 };
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static const dt_pad_t kOptOut[1] = {0};
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#else
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#error Unsupported top
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#endif
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static uint8_t kPads[kDtPadCount] = {0};
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@@ -173,12 +180,18 @@ bool test_main(void) {
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uint32_t deep_powerdown_en = rand_testutils_gen32_range(0, 1);
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bool deepsleep = (deep_powerdown_en) ? true : false;
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#if defined(OPENTITAN_IS_EARLGREY)
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// TODO(lowrisc/opentitan#15889): The weak pull on IOC3 needs to be
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// disabled for this test. Remove this later.
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dif_pinmux_pad_attr_t out_attr;
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dif_pinmux_pad_attr_t in_attr = {0};
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CHECK_DIF_OK(
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dif_pinmux_pad_write_attrs_dt(&pinmux, kDtPadIoc3, in_attr, &out_attr));
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#elif defined(OPENTITAN_IS_DARJEELING)
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// Nothing to be done
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#else
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#error Unsupported top
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#endif
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if (!deepsleep) {
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// Enable all the AON interrupts used in this test.

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