[hw,soc_proxy,rtl] Remove external interrupts, superseeded by tooling changes

Signed-off-by: Robert Schilling <[email protected]>

Author: Razer6

hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson

@@ -3941,21 +3941,6 @@
           conn_type: false
           index: -1
         }
-        {
-          name: soc_intr_async
-          desc: Interrupt request from SoC, asynchronous, level-encoded
-          struct: logic
-          type: uni
-          act: rcv
-          width: 32
-          inst_name: soc_proxy
-          default: ""
-          package: ""
-          external: true
-          top_signame: soc_intr_async
-          conn_type: false
-          index: -1
-        }
         {
           name: soc_gpi_async
           desc: GPI from SoC, async
@@ -11801,7 +11786,6 @@
       soc_proxy.soc_recov_alert: soc_recov_alert
       soc_proxy.soc_wkup_async: soc_wkup_async
       soc_proxy.soc_rst_req_async: soc_rst_req_async
-      soc_proxy.soc_intr_async: soc_intr_async
       soc_proxy.soc_lsio_trigger: soc_lsio_trigger
       soc_proxy.soc_gpi_async: soc_gpi_async
       soc_proxy.soc_gpo_async: soc_gpo_async
@@ -12198,7 +12182,7 @@
               {
                 hart: 0x22030000
               }
-              size_byte: 0x20
+              size_byte: 0x8
             }
           ]
           xbar: false
@@ -19353,18 +19337,6 @@
       plic: rv_plic
       outgoing: false
     }
-    {
-      name: soc_proxy_external
-      width: 32
-      type: interrupt
-      module_name: soc_proxy
-      desc: soc_proxy external interrupt
-      intr_type: IntrType.Event
-      default_val: false
-      incoming: false
-      plic: rv_plic
-      outgoing: false
-    }
     {
       name: hmac_hmac_done
       width: 1
@@ -20600,7 +20572,6 @@
     spi_host0
     pwrmgr_aon
     aon_timer_aon
-    soc_proxy
     hmac
     kmac
     otbn
@@ -23384,21 +23355,6 @@
         conn_type: false
         index: -1
       }
-      {
-        name: soc_intr_async
-        desc: Interrupt request from SoC, asynchronous, level-encoded
-        struct: logic
-        type: uni
-        act: rcv
-        width: 32
-        inst_name: soc_proxy
-        default: ""
-        package: ""
-        external: true
-        top_signame: soc_intr_async
-        conn_type: false
-        index: -1
-      }
       {
         name: soc_gpi_async
         desc: GPI from SoC, async
@@ -29822,18 +29778,6 @@
         index: -1
         netname: soc_rst_req_async
       }
-      {
-        package: ""
-        struct: logic
-        signame: soc_intr_async_i
-        width: 32
-        type: uni
-        default: ""
-        direction: in
-        conn_type: false
-        index: -1
-        netname: soc_intr_async
-      }
       {
         package: ""
         struct: logic

hw/top_darjeeling/data/top_darjeeling.hjson

@@ -1466,7 +1466,6 @@
         'soc_proxy.soc_recov_alert'            : 'soc_recov_alert',
         'soc_proxy.soc_wkup_async'             : 'soc_wkup_async',
         'soc_proxy.soc_rst_req_async'          : 'soc_rst_req_async',
-        'soc_proxy.soc_intr_async'             : 'soc_intr_async',
         'soc_proxy.soc_lsio_trigger'           : 'soc_lsio_trigger',
         'soc_proxy.soc_gpi_async'              : 'soc_gpi_async',
         'soc_proxy.soc_gpo_async'              : 'soc_gpo_async',

hw/top_darjeeling/doc/memory_map.md

@@ -30,7 +30,7 @@ The main address space, shared between the CPU and DM
 | pinmux_aon        | default     | `0x30460000`   | `0x800`        | `0x200`        | pinmux_aon                       |
 | aon_timer_aon     | default     | `0x30470000`   | `0x40`         | `0x10`         | aon_timer_aon                    |
 | ast               | default     | `0x30480000`   | `0x400`        | `0x100`        | ast                              |
-| soc_proxy         | core        | `0x22030000`   | `0x20`         | `0x8`          | core device on soc_proxy         |
+| soc_proxy         | core        | `0x22030000`   | `0x8`          | `0x2`          | core device on soc_proxy         |
 | sram_ctrl_ret_aon | regs        | `0x30500000`   | `0x40`         | `0x10`         | regs device on sram_ctrl_ret_aon |
 | rv_dm             | regs        | `0x21200000`   | `0x10`         | `0x4`          | regs device on rv_dm             |
 | rv_dm             | mem         | `0x40000`      | `0x1000`       | `0x400`        | mem device on rv_dm              |

hw/top_darjeeling/dv/autogen/xbar_env_pkg__params.sv

@@ -26,7 +26,7 @@ tl_device_t xbar_devices[$] = '{
         '{32'h211e1000, 32'h211e107f}
     }},
     '{"soc_proxy__core", '{
-        '{32'h22030000, 32'h2203001f}
+        '{32'h22030000, 32'h22030007}
     }},
     '{"soc_proxy__ctn", '{
         '{32'h40000000, 32'hbfffffff}

hw/top_darjeeling/dv/autogen/xbar_tgl_excl.cfg

@@ -43,7 +43,7 @@
 -node tb.dut*.u_rom_ctrl1 regs_tl_*i.a_address[23:21]
 -node tb.dut*.u_rom_ctrl1 regs_tl_*i.a_address[28:25]
 -node tb.dut*.u_rom_ctrl1 regs_tl_*i.a_address[31:30]
--node tb.dut*.u_soc_proxy core_tl_*i.a_address[15:5]
+-node tb.dut*.u_soc_proxy core_tl_*i.a_address[15:3]
 -node tb.dut*.u_soc_proxy core_tl_*i.a_address[24:18]
 -node tb.dut*.u_soc_proxy core_tl_*i.a_address[28:26]
 -node tb.dut*.u_soc_proxy core_tl_*i.a_address[31:30]

hw/top_darjeeling/dv/env/chip_if.sv

@@ -983,11 +983,6 @@ interface chip_if;
                                    `SOC_PROXY_HIER.wkup_internal_req_o,
                                    1)
 
-  // Signal probe function for `soc_intr_async_i` of TOP_HIER.
-  `DV_CREATE_SIGNAL_PROBE_FUNCTION(signal_probe_soc_intr_async,
-                                   `TOP_HIER.soc_intr_async_i,
-                                   soc_proxy_reg_pkg::NumExternalIrqs)
-
   // Signal probe function for `soc_fatal_alert_req` of TOP_HIER.
   `DV_CREATE_SIGNAL_PROBE_FUNCTION(signal_probe_soc_fatal_alert_req,
                                    `TOP_HIER.soc_fatal_alert_req_i,

hw/top_darjeeling/dv/env/seq_lib/chip_sw_soc_proxy_gpio_vseq.sv

@@ -31,7 +31,6 @@ class chip_sw_soc_proxy_gpio_vseq extends chip_sw_base_vseq;
     test_dio_soc_gpis();
     test_dio_soc_gpos();
     test_mio_soc_gpis();
-    send_external_irq();
     test_mio_soc_gpos();
   endtask
 
@@ -179,13 +178,6 @@ class chip_sw_soc_proxy_gpio_vseq extends chip_sw_base_vseq;
     end
   endtask
 
-  task send_external_irq();
-    void'(cfg.chip_vif.signal_probe_soc_intr_async(.kind(dv_utils_pkg::SignalProbeForce),
-                                             .value(1'b1)));
-    cfg.chip_vif.cpu_clk_rst_if.wait_clks(100);
-    void'(cfg.chip_vif.signal_probe_soc_intr_async(.kind(dv_utils_pkg::SignalProbeRelease)));
-  endtask
-
   task await_muxable_soc_gpis_mapped();
     `DV_WAIT(cfg.sw_logger_vif.printed_log == "Muxable SoC GPIs mapped.")
     muxable_soc_gpis_mapped = 1'b1;

hw/top_darjeeling/dv/env/seq_lib/chip_sw_soc_proxy_smoke_vseq.sv

@@ -73,39 +73,6 @@ class chip_sw_soc_proxy_smoke_vseq extends chip_sw_base_vseq;
       `dv_error("Resets did not complete within required time!")
     )
 
-    // Wait until SW confirms reset on external request.
-    `DV_WAIT(cfg.sw_logger_vif.printed_log == "Reset on external request.")
-
-    // Test external IRQs one after the other.
-    for (int unsigned i = 0; i < soc_proxy_reg_pkg::NumExternalIrqs; i++) begin
-      logic [soc_proxy_reg_pkg::NumExternalIrqs-1:0] intr = 1 << i;
-      string irq_str = $sformatf("IRQ %0d", i);
-
-      // Wait for SW to confirm that the IRQ is enabled.
-      `DV_WAIT(cfg.sw_logger_vif.printed_log == $sformatf("%s enabled.", irq_str))
-
-      // Trigger external IRQ.
-      `uvm_info(`gfn, $sformatf("Triggering %s.", irq_str), UVM_LOW)
-      void'(cfg.chip_vif.signal_probe_soc_intr_async(.kind(dv_utils_pkg::SignalProbeForce),
-                                                     .value(intr)));
-
-      fork
-        begin
-          // Ensure that an internal wakeup request is raised.
-          await_soc_proxy_wkup_internal_req();
-        end
-        begin
-          // Ensure that SW confirms the IRQ is pending in `soc_proxy` and `rv_plic`.
-          `DV_WAIT(cfg.sw_logger_vif.printed_log == $sformatf("%s pending in soc_proxy.", irq_str))
-          `DV_WAIT(cfg.sw_logger_vif.printed_log == $sformatf("%s pending in rv_plic.", irq_str))
-        end
-      join
-
-      // Deactivate external IRQ.
-      `uvm_info(`gfn, $sformatf("Releasing %s.", irq_str), UVM_LOW)
-      void'(cfg.chip_vif.signal_probe_soc_intr_async(.kind(dv_utils_pkg::SignalProbeRelease)));
-    end
-
   endtask
 
 endclass

hw/top_darjeeling/ip/soc_proxy/README.md

@@ -13,8 +13,6 @@ SoC Proxy is a simple comportable IP module that facilitates the breakout of sig
 - 2 Wakeup requests
   - Internal wakeup request, should be asserted whenever an external alert or IRQ is seen
   - External wakeup request
-- 32 Interrupts
-  - External interrupt requests
 
 ## SoC-facing interfaces
 

hw/top_darjeeling/ip/soc_proxy/data/soc_proxy.hjson

@@ -12,15 +12,6 @@
   hw_checklist:       "../doc/checklist"
   sw_checklist:       "/sw/ip/soc_proxy/dif/dif_soc_proxy"
 
-  param_list: [
-    { name:     "NumExternalIrqs"
-      type:     "int unsigned"
-      default:  "32"
-      desc:     "Number of external interrupt requests"
-      local:    "true"
-    }
-  ]
-
   revisions: [
     {
       version:            "1.0.0"
@@ -147,13 +138,6 @@
     }
   ]
 
-  interrupt_list: [
-    { name: "external"
-      desc: "External interrupt request"
-      width: 32 // keep equal to `NumExternalIrqs`
-    }
-  ]
-
   reset_request_list: [
     { name: "rst_req_external"
       desc: "External reset request"
@@ -279,13 +263,6 @@
       act:     "rcv"
       desc:    "Reset request from SoC, asynchronous, level-encoded"
     }
-    { struct:  "logic"
-      type:    "uni"
-      name:    "soc_intr_async"
-      act:     "rcv"
-      width:   32 // keep equal to `NumExternalIrqs`
-      desc:    "Interrupt request from SoC, asynchronous, level-encoded"
-    }
     { struct:  "logic"
       type:    "uni"
       name:    "soc_gpi_async"