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Cherry-pick to master: Testplan tyde up #28654

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Cherry-pick to master: Testplan tyde up #28654

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afe36ec
[testplan] Sanitize lc_states
engdoreis Oct 30, 2025
fc3b5f5
[testplan] Swap the first and second lines of the description
engdoreis Oct 30, 2025
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2 changes: 2 additions & 0 deletions hw/top_earlgrey/data/ip/chip_clkmgr_testplan.hjson
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Original file line number Diff line number Diff line change
Expand Up @@ -169,6 +169,8 @@
si_stage: SV3
lc_states: [
"DEV",
"TEST_UNLOCKED",
"RMA",
]
tests: [
"chip_sw_clkmgr_external_clk_src_for_sw_fast_dev",
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8 changes: 4 additions & 4 deletions hw/top_earlgrey/data/ip/chip_rv_dm_testplan.hjson
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Expand Up @@ -71,10 +71,10 @@
{
name: chip_rv_dm_perform_debug
desc: '''
- X-ref'ed with rom_e2e_jtag_debug from rom testplan.

Verify that ROM can be debugged in appropriate life cycle states.

- X-ref'ed with rom_e2e_jtag_debug from rom testplan.

`CREATOR_SW_CFG_ROM_EXEC_EN` should be set to `0`.

- Verify that ROM can be debugged in TEST, DEV, and RMA life cycle states.
Expand Down Expand Up @@ -106,7 +106,7 @@
"//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_rma",
"//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_test_unlocked0"
],
lc_states: ["DEV"]
lc_states: ["DEV", "TEST_UNLOCKED0", "RMA"]
host_support: true
features: [
"RV_DM.JTAG.FSM",
Expand Down Expand Up @@ -219,7 +219,7 @@
name: chip_sw_rv_dm_jtag_tap_sel
desc: '''Verify ability to select all available TAPs.

- Put life cycle on Test or RMA state, so that TAPs can be selected between life cycle
- Put life cycle on DEV, TEST_UNLOCKED or RMA state, so that TAPs can be selected between life cycle
RV_DM and DFT.
- Verify the TAP is selected correctly.
- X-ref'ed with chip_sw_tap_strap_sampling.
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