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Testing debug
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7 files changed

+70
-185
lines changed

7 files changed

+70
-185
lines changed

‎.vscode/launch-gd32vf103.json‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -19,22 +19,22 @@
1919
// This indicates that an unrecognized breakpoint location should automatically result in a pending breakpoint being created.
2020
"set breakpoint pending on",
2121

22-
// Launch OpenOCD
23-
// "target remote | openocd/bin/openocd -c \"gdb_port pipe; log_output openocd.log\" -f scripts/gd32vf103/flash-init.ocd -f interface/cmsis-dap.cfg -f scripts/gd32vf103/gd32vf103.ocd -f scripts/gd32vf103/debug.ocd ",
24-
"target remote | riscv-openocd/src/openocd -s riscv-openocd/tcl -c \"gdb_port pipe; log_output openocd.log\" -f scripts/gd32vf103/debug.ocd ",
22+
// Launch OpenOCD. Based on https://www.justinmklam.com/posts/2017/10/vscode-debugger-setup/
23+
"target remote | riscv-openocd/src/openocd -s riscv-openocd/tcl -c \"gdb_port pipe; log_output openocd.log\" -f scripts/gd32vf103/flash-init.ocd -f interface/cmsis-dap.cfg -f scripts/gd32vf103/gd32vf103.ocd -f scripts/gd32vf103/debug.ocd ",
2524

2625
// After loading the Application, run these gdb commands. The Application ELF image does not contain a valid Image Header.
27-
// "monitor reset halt",
28-
// "flushregs",
26+
"monitor reset halt", // Restart and halt
27+
"flushregs", // Flush the register cache
2928

30-
// If not using the Stub Bootloader boot_stub, we need to bypass the Bootloader and jump to the Application directly:
31-
// "stepi", // Must step before setting PC
32-
// "set $pc = Reset_Handler", // Prepare to jump to the Application's Reset Handler
33-
// "stepi", // Execute the Reset Handler
3429
"break main", // Break at main()
3530
"break __assert_func", // Break for any assert failures
3631
"break os_default_irq", // Break for any unhandled interrupts
3732

33+
// If not using the Stub Bootloader boot_stub, we need to bypass the Bootloader and jump to the Application directly:
34+
"stepi", // Must step before setting PC
35+
// "set $pc = Reset_Handler", // Prepare to jump to the Application's Reset Handler
36+
// "stepi", // Execute the Reset Handler
37+
3838
// "thb main",
3939
// "continue",
4040
]

‎.vscode/launch.json‎

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -19,22 +19,23 @@
1919
// This indicates that an unrecognized breakpoint location should automatically result in a pending breakpoint being created.
2020
"set breakpoint pending on",
2121

22-
// Launch OpenOCD
23-
// "target remote | openocd/bin/openocd -c \"gdb_port pipe; log_output openocd.log\" -f scripts/gd32vf103/flash-init.ocd -f interface/cmsis-dap.cfg -f scripts/gd32vf103/gd32vf103.ocd -f scripts/gd32vf103/debug.ocd ",
24-
"target remote | riscv-openocd/src/openocd -s riscv-openocd/tcl -c \"gdb_port pipe; log_output openocd.log\" -f scripts/gd32vf103/debug.ocd ",
22+
// Launch OpenOCD. Based on https://www.justinmklam.com/posts/2017/10/vscode-debugger-setup/
23+
"target remote | riscv-openocd/src/openocd -s riscv-openocd/tcl -c \"gdb_port pipe; log_output openocd.log\" -f scripts/gd32vf103/flash-init.ocd -f interface/cmsis-dap.cfg -f scripts/gd32vf103/gd32vf103.ocd -f scripts/gd32vf103/debug.ocd ",
2524

2625
// After loading the Application, run these gdb commands. The Application ELF image does not contain a valid Image Header.
27-
// "monitor reset halt",
28-
// "flushregs",
26+
"monitor riscv expose_csrs 3040-3071",
27+
"monitor reset halt", // Restart and halt
28+
"flushregs", // Flush the register cache
2929

30-
// If not using the Stub Bootloader boot_stub, we need to bypass the Bootloader and jump to the Application directly:
31-
// "stepi", // Must step before setting PC
32-
// "set $pc = Reset_Handler", // Prepare to jump to the Application's Reset Handler
33-
// "stepi", // Execute the Reset Handler
3430
"break main", // Break at main()
3531
"break __assert_func", // Break for any assert failures
3632
"break os_default_irq", // Break for any unhandled interrupts
3733

34+
// If not using the Stub Bootloader boot_stub, we need to bypass the Bootloader and jump to the Application directly:
35+
"stepi", // Must step before setting PC
36+
// "set $pc = Reset_Handler", // Prepare to jump to the Application's Reset Handler
37+
// "stepi", // Execute the Reset Handler
38+
3839
// "thb main",
3940
// "continue",
4041
]

‎openocd.log‎

Lines changed: 29 additions & 117 deletions
Original file line numberDiff line numberDiff line change
@@ -1,117 +1,29 @@
1-
User : 15 3 command.c:544 command_print(): debug_level: 4
2-
Debug: 16 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 1000
3-
Debug: 17 3 command.c:143 script_debug(): command - adapter_khz ocd_adapter_khz 1000
4-
Debug: 19 3 core.c:1645 jtag_config_khz(): handle jtag khz
5-
Debug: 20 3 core.c:1612 adapter_khz_to_speed(): convert khz to interface specific speed value
6-
Debug: 21 3 core.c:1612 adapter_khz_to_speed(): convert khz to interface specific speed value
7-
User : 22 3 command.c:544 command_print(): adapter speed: 1000 kHz
8-
Debug: 23 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_only
9-
Debug: 24 4 command.c:143 script_debug(): command - reset_config ocd_reset_config srst_only
10-
User : 26 4 command.c:544 command_print(): srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst
11-
Debug: 27 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_adapter_nsrst_assert_width 100
12-
Debug: 28 4 command.c:143 script_debug(): command - adapter_nsrst_assert_width ocd_adapter_nsrst_assert_width 100
13-
User : 30 4 command.c:544 command_print(): adapter_nsrst_assert_width: 100
14-
Debug: 31 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_interface cmsis-dap
15-
Debug: 32 4 command.c:143 script_debug(): command - interface ocd_interface cmsis-dap
16-
Debug: 34 4 command.c:364 register_command_handler(): registering 'ocd_cmsis-dap'...
17-
Debug: 35 4 command.c:364 register_command_handler(): registering 'ocd_cmsis-dap'...
18-
Debug: 36 4 command.c:364 register_command_handler(): registering 'ocd_cmsis_dap_vid_pid'...
19-
Debug: 37 4 command.c:364 register_command_handler(): registering 'ocd_cmsis_dap_serial'...
20-
Debug: 38 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select jtag
21-
Debug: 39 4 command.c:143 script_debug(): command - ocd_transport ocd_transport select jtag
22-
Debug: 40 4 command.c:364 register_command_handler(): registering 'ocd_jtag_flush_queue_sleep'...
23-
Debug: 41 4 command.c:364 register_command_handler(): registering 'ocd_jtag_rclk'...
24-
Debug: 42 4 command.c:364 register_command_handler(): registering 'ocd_jtag_ntrst_delay'...
25-
Debug: 43 4 command.c:364 register_command_handler(): registering 'ocd_jtag_ntrst_assert_width'...
26-
Debug: 44 4 command.c:364 register_command_handler(): registering 'ocd_scan_chain'...
27-
Debug: 45 4 command.c:364 register_command_handler(): registering 'ocd_jtag_reset'...
28-
Debug: 46 4 command.c:364 register_command_handler(): registering 'ocd_runtest'...
29-
Debug: 47 4 command.c:364 register_command_handler(): registering 'ocd_irscan'...
30-
Debug: 48 4 command.c:364 register_command_handler(): registering 'ocd_verify_ircapture'...
31-
Debug: 49 4 command.c:364 register_command_handler(): registering 'ocd_verify_jtag'...
32-
Debug: 50 4 command.c:364 register_command_handler(): registering 'ocd_tms_sequence'...
33-
Debug: 51 4 command.c:364 register_command_handler(): registering 'ocd_wait_srst_deassert'...
34-
Debug: 52 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
35-
Debug: 53 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
36-
Debug: 54 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
37-
Debug: 55 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
38-
Debug: 56 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
39-
Debug: 57 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
40-
Debug: 58 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
41-
Debug: 59 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
42-
Debug: 60 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
43-
Debug: 61 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
44-
Debug: 62 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
45-
Debug: 63 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
46-
Debug: 64 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
47-
Debug: 65 4 command.c:364 register_command_handler(): registering 'ocd_svf'...
48-
Debug: 66 4 command.c:364 register_command_handler(): registering 'ocd_xsvf'...
49-
Debug: 67 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_jtag newtap riscv cpu -irlen 5 -expected-id 0x1000563d
50-
Debug: 68 4 command.c:143 script_debug(): command - ocd_jtag ocd_jtag newtap riscv cpu -irlen 5 -expected-id 0x1000563d
51-
Debug: 69 4 tcl.c:550 jim_newtap_cmd(): Creating New Tap, Chip: riscv, Tap: cpu, Dotted: riscv.cpu, 4 params
52-
Debug: 70 5 tcl.c:574 jim_newtap_cmd(): Processing option: -irlen
53-
Debug: 71 5 tcl.c:574 jim_newtap_cmd(): Processing option: -expected-id
54-
Debug: 72 5 core.c:1304 jtag_tap_init(): Created Tap: riscv.cpu @ abs position 0, irlen 5, capture: 0x1 mask: 0x3
55-
Debug: 73 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target create riscv.cpu riscv -chain-position riscv.cpu
56-
Debug: 74 5 command.c:143 script_debug(): command - ocd_target ocd_target create riscv.cpu riscv -chain-position riscv.cpu
57-
Debug: 75 5 target.c:1929 target_free_all_working_areas_restore(): freeing all working areas
58-
Debug: 76 5 command.c:364 register_command_handler(): registering 'ocd_riscv'...
59-
Debug: 77 5 command.c:364 register_command_handler(): registering 'ocd_riscv'...
60-
Debug: 78 5 command.c:364 register_command_handler(): registering 'ocd_riscv'...
61-
Debug: 79 5 command.c:364 register_command_handler(): registering 'ocd_riscv'...
62-
Debug: 80 5 command.c:364 register_command_handler(): registering 'ocd_riscv'...
63-
Debug: 81 5 command.c:364 register_command_handler(): registering 'ocd_riscv'...
64-
Debug: 82 5 command.c:364 register_command_handler(): registering 'ocd_riscv'...
65-
Debug: 83 5 command.c:364 register_command_handler(): registering 'ocd_riscv'...
66-
Debug: 84 5 command.c:364 register_command_handler(): registering 'ocd_arm'...
67-
Debug: 85 5 command.c:364 register_command_handler(): registering 'ocd_arm'...
68-
Debug: 86 5 command.c:364 register_command_handler(): registering 'ocd_arm'...
69-
Debug: 87 5 command.c:364 register_command_handler(): registering 'ocd_arm'...
70-
Debug: 88 5 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
71-
Debug: 89 5 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
72-
Debug: 90 5 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
73-
Debug: 91 5 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
74-
Debug: 92 5 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
75-
Debug: 93 5 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
76-
Debug: 94 5 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
77-
Debug: 95 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
78-
Debug: 96 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
79-
Debug: 97 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
80-
Debug: 98 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
81-
Debug: 99 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
82-
Debug: 100 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
83-
Debug: 101 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
84-
Debug: 102 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
85-
Debug: 103 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
86-
Debug: 104 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
87-
Debug: 105 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
88-
Debug: 106 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
89-
Debug: 107 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
90-
Debug: 108 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
91-
Debug: 109 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
92-
Debug: 110 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
93-
Debug: 111 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
94-
Debug: 112 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
95-
Debug: 113 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
96-
Debug: 114 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
97-
Debug: 115 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
98-
Debug: 116 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
99-
Debug: 117 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
100-
Debug: 118 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
101-
Debug: 119 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
102-
Debug: 120 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
103-
Debug: 121 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
104-
Debug: 122 6 command.c:364 register_command_handler(): registering 'ocd_riscv.cpu'...
105-
Debug: 123 6 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_riscv.cpu configure -work-area-phys 0x20000000 -work-area-size 20480 -work-area-backup 0
106-
Debug: 124 6 command.c:143 script_debug(): command - ocd_riscv.cpu ocd_riscv.cpu configure -work-area-phys 0x20000000 -work-area-size 20480 -work-area-backup 0
107-
Debug: 125 6 target.c:1929 target_free_all_working_areas_restore(): freeing all working areas
108-
Debug: 126 6 target.c:1929 target_free_all_working_areas_restore(): freeing all working areas
109-
Debug: 127 6 target.c:1929 target_free_all_working_areas_restore(): freeing all working areas
110-
Debug: 128 6 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_flash bank riscv.flash gd32vf103 0x08000000 0 0 0 riscv.cpu
111-
Debug: 129 6 command.c:143 script_debug(): command - ocd_flash ocd_flash bank riscv.flash gd32vf103 0x08000000 0 0 0 riscv.cpu
112-
Error: 131 6 tcl.c:1115 handle_flash_bank_command(): flash driver 'gd32vf103' not found
113-
Debug: 132 7 command.c:645 run_command(): Command 'bank' failed with error code -4
114-
User : 133 7 command.c:708 command_run_line():
115-
Debug: 134 7 riscv.c:270 riscv_deinit_target(): riscv_deinit_target()
116-
Error: 135 7 riscv.c:233 get_target_type(): Target has not been initialized
117-
Debug: 136 7 target.c:1929 target_free_all_working_areas_restore(): freeing all working areas
1+
adapter_nsrst_assert_width: 100
2+
3+
riscv.flash
4+
debug_level: 2
5+
6+
Info : Listening on port 6666 for tcl connections
7+
Info : Listening on port 4444 for telnet connections
8+
Info : CMSIS-DAP: SWD Supported
9+
Info : CMSIS-DAP: JTAG Supported
10+
Info : CMSIS-DAP: FW Version = 2.0.0
11+
Info : CMSIS-DAP: Interface Initialised (JTAG)
12+
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 0 nTRST = 0 nRESET = 1
13+
Info : CMSIS-DAP: Interface ready
14+
Info : clock speed 1000 kHz
15+
Info : cmsis-dap JTAG TLR_RESET
16+
Info : cmsis-dap JTAG TLR_RESET
17+
Info : JTAG tap: riscv.cpu tap/device found: 0x1e200a6d (mfg: 0x536 (Nuclei System Technology Co.,Ltd.), part: 0xe200, ver: 0x1)
18+
Info : JTAG tap: auto0.tap tap/device found: 0x790007a3 (mfg: 0x3d1 (GigaDevice Semiconductor (Beijing)), part: 0x9000, ver: 0x7)
19+
Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -irlen 5 -expected-id 0x790007a3"
20+
Info : datacount=4 progbufsize=2
21+
Info : Examined RISC-V core; found 1 harts
22+
Info : hart 0: XLEN=32, misa=0x40901105
23+
Info : accepting 'gdb' connection from pipe
24+
Info : cmsis-dap JTAG TLR_RESET
25+
Info : cmsis-dap JTAG TLR_RESET
26+
Info : cmsis-dap JTAG TLR_RESET
27+
Info : JTAG tap: riscv.cpu tap/device found: 0x1e200a6d (mfg: 0x536 (Nuclei System Technology Co.,Ltd.), part: 0xe200, ver: 0x1)
28+
Info : JTAG tap: auto0.tap tap/device found: 0x790007a3 (mfg: 0x3d1 (GigaDevice Semiconductor (Beijing)), part: 0x9000, ver: 0x7)
29+
Info : dropped 'gdb' connection

‎scripts/gd32vf103/debug.ocd‎

Lines changed: 8 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
# OpenOCD script for debugger
2+
# Based on https://github.com/Tencent/TencentOS-tiny/blob/master/doc/RISC-V%20eclipse%20%E5%BC%80%E5%8F%91%E7%8E%AF%E5%A2%83%E6%90%AD%E5%BB%BA.md
23

34
# Debug Level must be 2 or greater or gdb will fail.
45
debug_level 2
@@ -11,52 +12,14 @@ debug_level 2
1112
# }
1213

1314
# Connect to the MCU
15+
# echo "Connecting..."
16+
# riscv set_reset_timeout_sec 1
1417
# init
18+
# halt
19+
# echo ""
1520

1621
# Restart the device and halt
1722
# echo "Restarting..."
18-
# reset halt
19-
20-
# From https://github.com/Tencent/TencentOS-tiny/blob/master/doc/RISC-V%20eclipse%20%E5%BC%80%E5%8F%91%E7%8E%AF%E5%A2%83%E6%90%AD%E5%BB%BA.md
21-
22-
adapter_khz 1000
23-
reset_config srst_only
24-
adapter_nsrst_assert_width 100
25-
26-
interface cmsis-dap
27-
28-
transport select jtag
29-
30-
#autoexit true
31-
32-
set _CHIPNAME riscv
33-
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d
34-
35-
set _TARGETNAME $_CHIPNAME.cpu
36-
target create $_TARGETNAME riscv -chain-position $_TARGETNAME
37-
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 20480 -work-area-backup 0
38-
39-
40-
# Work-area is a space in RAM used for flash programming
41-
if { [info exists WORKAREASIZE] } {
42-
set _WORKAREASIZE $WORKAREASIZE
43-
} else {
44-
set _WORKAREASIZE 0x5000
45-
}
46-
47-
# Allow overriding the Flash bank size
48-
if { [info exists FLASH_SIZE] } {
49-
set _FLASH_SIZE $FLASH_SIZE
50-
} else {
51-
# autodetect size
52-
set _FLASH_SIZE 0
53-
}
54-
55-
# flash size will be probed
56-
set _FLASHNAME $_CHIPNAME.flash
57-
58-
####TODO flash bank bin/targets/gd32vf103c-start_my_sensor/app/apps/my_sensor_app/my_sensor_app.img gd32vf103 0x08001000 0 0 0 $_TARGETNAME
59-
riscv set_reset_timeout_sec 1
60-
init
61-
62-
halt
23+
# reset
24+
# halt
25+
# echo ""

‎scripts/gd32vf103/flash-app.ocd‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,14 @@ echo "Flashing Application..."
99
flash bank bin/targets/gd32vf103c-start_my_sensor/app/apps/my_sensor_app/my_sensor_app.img gd32vf103 0x08001000 0 0 0 $_TARGETNAME
1010
echo ""
1111

12-
# Restart the device.
13-
echo "Restarting..."
12+
# Connect to the MCU
13+
echo "Connecting..."
1414
riscv set_reset_timeout_sec 1
1515
init
16+
echo ""
17+
18+
# Restart the device.
19+
echo "Restarting..."
1620
reset halt
1721
echo ""
1822

‎scripts/gd32vf103/flash-boot.ocd‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,14 @@ echo "Flashing Bootloader..."
99
flash bank bin/targets/gd32vf103c-start_boot/app/apps/boot_stub/boot_stub.elf.bin gd32vf103 0x08000000 0 0 0 $_TARGETNAME
1010
echo ""
1111

12-
# Restart the device.
13-
echo "Restarting..."
12+
# Connect to the MCU
13+
echo "Connecting..."
1414
riscv set_reset_timeout_sec 1
1515
init
16+
echo ""
17+
18+
# Restart the device.
19+
echo "Restarting..."
1620
reset halt
1721
echo ""
1822

‎scripts/gd32vf103/gd32vf103.ocd‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,8 @@ set _CHIPNAME riscv
77

88
# Change expected ID for other dev boards
99
# For GD32VF103C-START:
10-
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d
10+
# jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d
11+
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1e200a6d
1112

1213
set _TARGETNAME $_CHIPNAME.cpu
1314
target create $_TARGETNAME riscv -chain-position $_TARGETNAME

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