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tlcs900: Add TMP94C241 LDC control register mappings for DMA#14970

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tlcs900: Add TMP94C241 LDC control register mappings for DMA#14970
felipesanches wants to merge 1 commit intomamedev:masterfrom
felipesanches:kn5000_pr1_ldc_cr_mapping

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Summary

  • Add TMP94C241 DMA control register encodings to the LDC instruction handler in 900tbl.hxx
  • Refactor disassembler CR register names from hardcoded switches into per-variant symbol tables
  • No changes to existing TMP96C141/TMP95C061/TMP95C063 behavior

Problem

The LDC (Load Control Register) instruction uses an immediate byte to select which internal register to access. The TMP94C241 places its DMA registers at different offsets than the TMP96C141/TMP95C061/TMP95C063:

Register TMP96C141/TMP95C061/TMP95C063 TMP94C241
DMAM0-3 (8-bit) 0x22, 0x26, 0x2A, 0x2E 0x42, 0x46, 0x4A, 0x4E
DMAC0-3 (16-bit) 0x20, 0x24, 0x28, 0x2C 0x40, 0x44, 0x48, 0x4C
DMAD0-3 (32-bit) 0x10, 0x14, 0x18, 0x1C 0x20, 0x24, 0x28, 0x2C
DMAS0-3 (32-bit) 0x00, 0x04, 0x08, 0x0C 0x00, 0x04, 0x08, 0x0C

Without the TMP94C241 cases, LDC cr,DMAMn writes go to a dummy register and DMA never configures. This blocks the Technics KN5000 (the only driver currently using TMP94C241) from performing HDMA-based firmware payload transfers.

Changes

900tbl.hxx: Add TMP94C241 case entries to the six existing CR switch blocks in prepare_operands(). The encoding values are disjoint between variants so the new cases coexist harmlessly — unreachable cases have zero runtime cost in the compiler's jump table. Each case is annotated with a comment identifying which variant(s) use that encoding.

dasm900.h: Add cr_sym struct and cr_name() lookup, paralleling the existing SFR symbol table pattern.

dasm900.cpp: Replace six hardcoded switch blocks for O_CR8/O_CR16/O_CR32 with table-driven lookups via cr_name().

tmp94c241.cpp, tmp96c141.cpp, tmp95c061.cpp, tmp95c063.cpp: Each variant defines its own *_cr_syms[] table passed to the disassembler constructor.

Test plan

  • Verified existing TMP96C141/TMP95C061/TMP95C063 CR register disassembly is unchanged
  • Verified TMP94C241 DMA register writes now reach the correct internal registers
  • KN5000 HDMA payload transfer completes successfully with this fix applied

Reference

Toshiba TMP94C241F Data Sheet, Section 5 "DMA Controller", Table 5-1 "DMA Register Map".

The LDC instruction uses an immediate byte to select control registers.
Different TLCS-900/H variants place their DMA registers at different
offsets within this encoding space. The disassembler previously had all
variants' CR register names hardcoded in the shared dasm900.cpp.

Refactor CR register name resolution into a table-driven lookup that
each variant provides alongside its existing SFR symbol table. This
moves model-specific register names to the model-specific source files,
following the same pattern already used for SFR symbolic names.

Add TMP94C241 DMA control register encodings (DMAM at 0x42-0x4e,
DMAC at 0x40-0x4c, DMAD at 0x20-0x2c) which differ from the
TMP96C141/TMP95C061/TMP95C063 encodings (DMAM at 0x22-0x2e,
DMAC at 0x20-0x2c, DMAD at 0x10-0x1c).
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