Efinix ti60 board support package

boards/riscv/titanium_ti60_f225/Kconfig.board

@@ -0,0 +1,6 @@
+# Copyright (c) 2023 Efinix Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_TITANIUM_TI60_F225
+	bool "Board with Efinix Sapphire riscv SoC"
+	depends on SOC_SERIES_EFINIX_SAPPHIRE

boards/riscv/titanium_ti60_f225/Kconfig.defconfig

@@ -0,0 +1,9 @@
+# Copyright (c) 2023 Efinix Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_TITANIUM_TI60_F225
+
+config BOARD
+	default "titanium_ti60_f225"
+
+endif # BOARD_TITANIUM_TI60_F225

boards/riscv/titanium_ti60_f225/doc/index.rst

@@ -0,0 +1,60 @@
+.. _titanium_ti60_f225:
+
+Efinix Titanium Ti60 F225
+#########################
+
+Overview
+********
+
+The Efinix Titanium Ti60 F225 development kit contains a Ti60 FPGA, which is fabricated on a 16nm process and deliver
+high performance with the lowest possible power on a small physical size. In addition, Efinix offers Sapphire SoC IP,
+which is a user-configurable RISC-V SoC based on the VexRiscv core with configurable feature set and extension.
+Using the Efinity IP Manager, you can configure the SoC to include only the peripherals that you require.
+
+.. figure:: img/ti60f225-board-top.jpg
+   :align: center
+   :alt: titanium_ti60_f225_board
+
+Figure is the development board
+
+Board block diagram
+*******************
+
+.. figure:: img/Ti60-BGA225-board-block-diagram.jpg
+   :align: center
+   :alt: titanium_ti60_f225_board-block-diagram
+
+More information can be found on `Ti60F225`_ website.
+
+Sapphire SoC setup on the FPGA guide
+*************************************
+
+Guide to setup the SoC found at `Efinix-Zephyr`_
+
+Building
+********
+
+Build applications as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: titanium_ti60_f225
+   :goals: build
+
+Flashing
+********
+
+Flashing the binary into SPI NOR flash requires Efinity programmer, Please find the guide at `Efinix-Zephyr`_
+
+.. note::
+
+   The Zephyr RTOS has been verified using the SoC bitstream generated by Efinity IDE v2022.2.322.
+
+References
+**********
+
+.. target-notes::
+
+.. _Ti60F225: https://www.efinixinc.com/products-devkits-titaniumti60f225.html
+.. _Efinix-Zephyr: https://github.com/Efinix-Inc/zephyr-efinix

boards/riscv/titanium_ti60_f225/titanium_ti60_f225.dts

@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2023 Efinix Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <efinix/sapphire_soc.dtsi>
+
+/ {
+	model = "Efinix Titanium Ti60 F225";
+	compatible = "efinix,titanium-ti60-f225";
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,sram = &ram0;
+	};
+
+	aliases {
+		led0 = &green_led;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		green_led: led_0 {
+			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			label = "Green LED 3";
+		};
+
+
+		red_led: led_1 {
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			label = "Red LED 2";
+		};
+
+		blue_led: led_2 {
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			label = "Blue LED 1";
+		};
+
+	};
+
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <115200>;
+};
+
+&gpio0 {
+	status = "okay";
+};

boards/riscv/titanium_ti60_f225/titanium_ti60_f225.yaml

@@ -0,0 +1,10 @@
+identifier: titanium_ti60_f225
+name: titanium_ti60_f225 FPGA development kit with Efinix Sapphire riscv SoC
+type: mcu
+arch: riscv32
+toolchain:
+  - zephyr
+ram: 196608
+supported:
+  - gpio
+  - uart

boards/riscv/titanium_ti60_f225/titanium_ti60_f225_defconfig

@@ -0,0 +1,13 @@
+# Copyright (c) 2023 Efinix Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_EFINIX_SAPPHIRE=y
+CONFIG_BOARD_TITANIUM_TI60_F225=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_GPIO=y
+CONFIG_CLOCK_CONTROL=n
+CONFIG_XIP=n
+CONFIG_HEAP_MEM_POOL_SIZE=16384
+CONFIG_INIT_STACKS=n

drivers/gpio/CMakeLists.txt

@@ -76,6 +76,7 @@ zephyr_library_sources_ifdef(CONFIG_GPIO_RT1718S    gpio_rt1718s.c)
 zephyr_library_sources_ifdef(CONFIG_GPIO_RT1718S    gpio_rt1718s_port.c)
 zephyr_library_sources_ifdef(CONFIG_GPIO_NUMICRO    gpio_numicro.c)
 zephyr_library_sources_ifdef(CONFIG_GPIO_HOGS       gpio_hogs.c)
+zephyr_library_sources_ifdef(CONFIG_GPIO_EFINIX_SAPPHIRE    gpio_efinix_sapphire.c)
 
 if(CONFIG_GPIO_SC18IM704)
   zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)

drivers/gpio/Kconfig

@@ -195,4 +195,6 @@ source "drivers/gpio/Kconfig.bd8lb600fs"
 
 source "drivers/gpio/Kconfig.sc18im704"
 
+source "drivers/gpio/Kconfig.efinix_sapphire"
+
 endif # GPIO

drivers/gpio/Kconfig.efinix_sapphire

@@ -0,0 +1,9 @@
+# Copyright (c) 2023 Efinix Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config GPIO_EFINIX_SAPPHIRE
+	bool "Efinx sapphire GPIO driver"
+	default y
+	depends on DT_HAS_EFINIX_SAPPHIRE_GPIO_ENABLED
+	help
+	  Enable Efinix sapphire GPIO driver.