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Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211013' into staging
Use MO_128 for 16-byte atomic memory operations. Add cpu_ld/st_mmu memory primitives. Move helper_ld/st memory helpers out of tcg.h. Canonicalize alignment flags in MemOp. # gpg: Signature made Wed 13 Oct 2021 10:48:45 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "[email protected]" # gpg: Good signature from "Richard Henderson <[email protected]>" [ultimate] * remotes/rth/tags/pull-tcg-20211013: tcg: Canonicalize alignment flags in MemOp tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h target/arm: Use cpu_*_mmu instead of helper_*_mmu target/sparc: Use cpu_*_mmu instead of helper_*_mmu target/s390x: Use cpu_*_mmu instead of helper_*_mmu target/mips: Use 8-byte memory ops for msa load/store target/mips: Use cpu_*_data_ra for msa load/store accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h accel/tcg: Add cpu_{ld,st}*_mmu interfaces target/hexagon: Implement cpu_mmu_index target/s390x: Use MO_128 for 16 byte atomics target/ppc: Use MO_128 for 16 byte atomics target/i386: Use MO_128 for 16 byte atomics target/arm: Use MO_128 for 16 byte atomics memory: Log access direction for invalid accesses Signed-off-by: Richard Henderson <[email protected]>
2 parents 984b2b5 + 76e366e commit e5b2333

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21 files changed

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21 files changed

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lines changed

‎accel/tcg/cputlb.c‎

Lines changed: 127 additions & 266 deletions
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‎accel/tcg/ldst_common.c.inc‎

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/*
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* Routines common to user and system emulation of load/store.
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
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return cpu_ldb_mmu(env, addr, oi, ra);
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}
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int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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return (int8_t)cpu_ldub_mmuidx_ra(env, addr, mmu_idx, ra);
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}
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uint32_t cpu_lduw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx);
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return cpu_ldw_be_mmu(env, addr, oi, ra);
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}
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int cpu_ldsw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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return (int16_t)cpu_lduw_be_mmuidx_ra(env, addr, mmu_idx, ra);
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}
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uint32_t cpu_ldl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx);
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return cpu_ldl_be_mmu(env, addr, oi, ra);
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}
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uint64_t cpu_ldq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_BEQ | MO_UNALN, mmu_idx);
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return cpu_ldq_be_mmu(env, addr, oi, ra);
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}
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uint32_t cpu_lduw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx);
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return cpu_ldw_le_mmu(env, addr, oi, ra);
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}
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int cpu_ldsw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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return (int16_t)cpu_lduw_le_mmuidx_ra(env, addr, mmu_idx, ra);
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}
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uint32_t cpu_ldl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx);
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return cpu_ldl_le_mmu(env, addr, oi, ra);
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}
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uint64_t cpu_ldq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_LEQ | MO_UNALN, mmu_idx);
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return cpu_ldq_le_mmu(env, addr, oi, ra);
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}
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void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
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cpu_stb_mmu(env, addr, val, oi, ra);
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}
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void cpu_stw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx);
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cpu_stw_be_mmu(env, addr, val, oi, ra);
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}
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void cpu_stl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx);
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cpu_stl_be_mmu(env, addr, val, oi, ra);
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}
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void cpu_stq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_BEQ | MO_UNALN, mmu_idx);
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cpu_stq_be_mmu(env, addr, val, oi, ra);
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}
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void cpu_stw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx);
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cpu_stw_le_mmu(env, addr, val, oi, ra);
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}
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void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx);
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cpu_stl_le_mmu(env, addr, val, oi, ra);
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}
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void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_LEQ | MO_UNALN, mmu_idx);
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cpu_stq_le_mmu(env, addr, val, oi, ra);
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}
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/*--------------------------*/
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uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_ldub_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return (int8_t)cpu_ldub_data_ra(env, addr, ra);
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}
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uint32_t cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_lduw_be_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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int cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return (int16_t)cpu_lduw_be_data_ra(env, addr, ra);
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}
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uint32_t cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_ldl_be_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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uint64_t cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_ldq_be_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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uint32_t cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_lduw_le_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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int cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return (int16_t)cpu_lduw_le_data_ra(env, addr, ra);
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}
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uint32_t cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_ldl_le_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_ldq_le_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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void cpu_stb_data_ra(CPUArchState *env, abi_ptr addr,
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uint32_t val, uintptr_t ra)
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{
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cpu_stb_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stw_be_data_ra(CPUArchState *env, abi_ptr addr,
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uint32_t val, uintptr_t ra)
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{
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cpu_stw_be_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stl_be_data_ra(CPUArchState *env, abi_ptr addr,
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uint32_t val, uintptr_t ra)
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{
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cpu_stl_be_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stq_be_data_ra(CPUArchState *env, abi_ptr addr,
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uint64_t val, uintptr_t ra)
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{
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cpu_stq_be_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stw_le_data_ra(CPUArchState *env, abi_ptr addr,
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uint32_t val, uintptr_t ra)
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{
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cpu_stw_le_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr addr,
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uint32_t val, uintptr_t ra)
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{
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cpu_stl_le_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr,
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uint64_t val, uintptr_t ra)
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{
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cpu_stq_le_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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/*--------------------------*/
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uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_ldub_data_ra(env, addr, 0);
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}
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int cpu_ldsb_data(CPUArchState *env, abi_ptr addr)
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{
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return (int8_t)cpu_ldub_data(env, addr);
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}
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uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_lduw_be_data_ra(env, addr, 0);
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}
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int cpu_ldsw_be_data(CPUArchState *env, abi_ptr addr)
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{
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return (int16_t)cpu_lduw_be_data(env, addr);
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}
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uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_ldl_be_data_ra(env, addr, 0);
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}
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uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_ldq_be_data_ra(env, addr, 0);
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}
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uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_lduw_le_data_ra(env, addr, 0);
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}
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int cpu_ldsw_le_data(CPUArchState *env, abi_ptr addr)
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{
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return (int16_t)cpu_lduw_le_data(env, addr);
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}
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uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_ldl_le_data_ra(env, addr, 0);
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}
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uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_ldq_le_data_ra(env, addr, 0);
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}
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void cpu_stb_data(CPUArchState *env, abi_ptr addr, uint32_t val)
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{
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cpu_stb_data_ra(env, addr, val, 0);
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}
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void cpu_stw_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
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{
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cpu_stw_be_data_ra(env, addr, val, 0);
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}
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void cpu_stl_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
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{
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cpu_stl_be_data_ra(env, addr, val, 0);
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}
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void cpu_stq_be_data(CPUArchState *env, abi_ptr addr, uint64_t val)
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{
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cpu_stq_be_data_ra(env, addr, val, 0);
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}
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void cpu_stw_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
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{
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cpu_stw_le_data_ra(env, addr, val, 0);
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}
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void cpu_stl_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
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{
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cpu_stl_le_data_ra(env, addr, val, 0);
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}
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void cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val)
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{
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cpu_stq_le_data_ra(env, addr, val, 0);
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}

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