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vladimirradosavljevicakiramenai
vladimirradosavljevic
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akiramenai
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[EraVM] Fix two non-commutative arith patterns
This patch fixes the order of input operands in crr_s and crs_s patterns. Thus it enables crr_s, crs_s forms for non-commutative instructions to be selected saving on materialisation of big integers. Before the patch the incorrect patterns didn't cause bugs because yrr_s, yrs_s override them. Signed-off-by: Vladimir Radosavljevic <[email protected]>
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7 files changed

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-31
lines changed

7 files changed

+27
-31
lines changed

‎llvm/lib/Target/EraVM/EraVMInstrInfo.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -462,15 +462,15 @@ multiclass ArithINonCommutable<EraVMOpcode opcode, SDPatternOperator node> : Ari
462462
}
463463

464464
// non-commutative: irr_s -> crr_s
465-
def : Pat<(node GR256:$rs1, large_imm:$imm),
465+
def : Pat<(node large_imm:$imm, GR256:$rs1),
466466
(!cast<Instruction>(NAME # crr_s) (constant_pool imm:$imm), 0, GR256:$rs1, 0)>;
467467

468468
// xrr_s -> yrr_s
469469
def : Pat<(node GR256:$rs1, large_imm:$imm),
470470
(!cast<Instruction>(NAME # yrr_s) (constant_pool imm:$imm), 0, GR256:$rs1, 0)>;
471471

472472
// non-commutative: irs_s -> crs_s
473-
def : Pat<(store_stack (node GR256:$rs1, large_imm:$imm), stackaddr:$dst0),
473+
def : Pat<(store_stack (node large_imm:$imm, GR256:$rs1), stackaddr:$dst0),
474474
(!cast<Instruction>(NAME # crs_s) (constant_pool imm:$imm), 0, GR256:$rs1, stackaddr:$dst0, 0)>;
475475

476476
// xrs_s -> yrs_s

‎llvm/test/CodeGen/EraVM/rol.ll‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -61,8 +61,7 @@ entry:
6161
define i256 @rolcrr_cp(i256 %rs1) {
6262
; CHECK-LABEL: rolcrr_cp:
6363
; CHECK: ; %bb.0: ; %entry
64-
; CHECK-NEXT: add @CPI4_0[0], r0, r2
65-
; CHECK-NEXT: rol r2, r1, r1
64+
; CHECK-NEXT: rol @CPI4_0[0], r1, r1
6665
; CHECK-NEXT: ret
6766
entry:
6867
%sub = sub i256 256, %rs1
@@ -186,8 +185,7 @@ define void @rolcrs_cp(i256 %rs1) {
186185
; CHECK-LABEL: rolcrs_cp:
187186
; CHECK: ; %bb.0: ; %entry
188187
; CHECK-NEXT: nop stack+=[1 + r0]
189-
; CHECK-NEXT: add @CPI12_0[0], r0, r2
190-
; CHECK-NEXT: rol r2, r1, stack-[1]
188+
; CHECK-NEXT: rol @CPI12_0[0], r1, stack-[1]
191189
; CHECK-NEXT: ret
192190
entry:
193191
%destptr = alloca i256

‎llvm/test/CodeGen/EraVM/ror.ll‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -59,8 +59,7 @@ entry:
5959
define i256 @rorcrr_cp(i256 %rs1) {
6060
; CHECK-LABEL: rorcrr_cp:
6161
; CHECK: ; %bb.0: ; %entry
62-
; CHECK-NEXT: add @CPI4_0[0], r0, r2
63-
; CHECK-NEXT: ror r2, r1, r1
62+
; CHECK-NEXT: ror @CPI4_0[0], r1, r1
6463
; CHECK-NEXT: ret
6564
entry:
6665
%sub = sub i256 256, %rs1
@@ -182,8 +181,7 @@ define void @rorcrs_cp(i256 %rs1) {
182181
; CHECK-LABEL: rorcrs_cp:
183182
; CHECK: ; %bb.0: ; %entry
184183
; CHECK-NEXT: nop stack+=[1 + r0]
185-
; CHECK-NEXT: add @CPI12_0[0], r0, r2
186-
; CHECK-NEXT: ror r2, r1, stack-[1]
184+
; CHECK-NEXT: ror @CPI12_0[0], r1, stack-[1]
187185
; CHECK-NEXT: ret
188186
entry:
189187
%destptr = alloca i256

‎llvm/test/CodeGen/EraVM/sdiv.ll‎

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -9,12 +9,12 @@ define i256 @srem(i256 %rs1, i256 %rs2) nounwind {
99
; CHECK-LABEL: srem:
1010
; CHECK: ; %bb.0:
1111
; CHECK-NEXT: div.s! @CPI0_0[0], r2, r2, r3
12-
; CHECK-NEXT: sub @CPI0_0[0], r3, r4
13-
; CHECK-NEXT: add.eq r3, r0, r4
14-
; CHECK-NEXT: div.s! @CPI0_0[0], r1, r3, r5
15-
; CHECK-NEXT: sub @CPI0_0[0], r5, r2
16-
; CHECK-NEXT: add.eq r5, r0, r2
17-
; CHECK-NEXT: div r2, r4, r3, r2
12+
; CHECK-NEXT: sub @CPI0_0[0], r3, r2
13+
; CHECK-NEXT: add.eq r3, r0, r2
14+
; CHECK-NEXT: div.s! @CPI0_0[0], r1, r3, r4
15+
; CHECK-NEXT: sub @CPI0_0[0], r4, r3
16+
; CHECK-NEXT: add.eq r4, r0, r3
17+
; CHECK-NEXT: div r3, r2, r3, r2
1818
; CHECK-NEXT: and! @CPI0_0[0], r1, r1
1919
; CHECK-NEXT: sub 0, r2, r1
2020
; CHECK-NEXT: add.eq r2, r0, r1
@@ -31,13 +31,13 @@ define i256 @sdiv(i256 %rs1, i256 %rs2) nounwind {
3131
; CHECK-LABEL: sdiv:
3232
; CHECK: ; %bb.0:
3333
; CHECK-NEXT: div.s! @CPI1_0[0], r2, r2, r3
34-
; CHECK-NEXT: sub @CPI1_0[0], r3, r5
35-
; CHECK-NEXT: add.eq r3, r0, r5
34+
; CHECK-NEXT: sub @CPI1_0[0], r3, r4
35+
; CHECK-NEXT: add.eq r3, r0, r4
3636
; CHECK-NEXT: div.s! @CPI1_0[0], r1, r1, r3
3737
; CHECK-NEXT: xor r1, r2, r2
3838
; CHECK-NEXT: sub @CPI1_0[0], r3, r1
3939
; CHECK-NEXT: add.eq r3, r0, r1
40-
; CHECK-NEXT: div r1, r5, r1, r3
40+
; CHECK-NEXT: div r1, r4, r1, r3
4141
; CHECK-NEXT: shl.s! 255, r2, r2
4242
; CHECK-NEXT: sub r2, r1, r3
4343
; CHECK-NEXT: or r3, r2, r2
@@ -54,13 +54,13 @@ define i256 @sdivrem(i256 %rs1, i256 %rs2) nounwind {
5454
; CHECK-LABEL: sdivrem:
5555
; CHECK: ; %bb.0:
5656
; CHECK-NEXT: div.s! @CPI2_0[0], r2, r2, r3
57-
; CHECK-NEXT: sub @CPI2_0[0], r3, r5
58-
; CHECK-NEXT: add.eq r3, r0, r5
59-
; CHECK-NEXT: div.s! @CPI2_0[0], r1, r3, r6
57+
; CHECK-NEXT: sub @CPI2_0[0], r3, r4
58+
; CHECK-NEXT: add.eq r3, r0, r4
59+
; CHECK-NEXT: div.s! @CPI2_0[0], r1, r3, r5
6060
; CHECK-NEXT: xor r3, r2, r2
61-
; CHECK-NEXT: sub @CPI2_0[0], r6, r3
62-
; CHECK-NEXT: add.eq r6, r0, r3
63-
; CHECK-NEXT: div r3, r5, r4, r3
61+
; CHECK-NEXT: sub @CPI2_0[0], r5, r3
62+
; CHECK-NEXT: add.eq r5, r0, r3
63+
; CHECK-NEXT: div r3, r4, r4, r3
6464
; CHECK-NEXT: shl.s! 255, r2, r2
6565
; CHECK-NEXT: sub r2, r4, r5
6666
; CHECK-NEXT: or r5, r2, r2

‎llvm/test/CodeGen/EraVM/shl.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ define i256 @shlcrr(i256 %rs1) nounwind {
3636

3737
; CHECK-LABEL: shlcrr_cp
3838
define i256 @shlcrr_cp(i256 %rs1) nounwind {
39-
; CHECK: shl r2, r1, r1
39+
; CHECK: shl @CPI4_0[0], r1, r1
4040
%res = shl i256 123456789, %rs1
4141
ret i256 %res
4242
}
@@ -107,7 +107,7 @@ define void @shlcrs(i256 %rs1) nounwind {
107107
; CHECK-LABEL: shlcrs_cp
108108
define void @shlcrs_cp(i256 %rs1) nounwind {
109109
%valptr = alloca i256
110-
; CHECK: shl r2, r1, stack-[1]
110+
; CHECK: shl @CPI12_0[0], r1, stack-[1]
111111
%res = shl i256 123456789, %rs1
112112
store i256 %res, i256* %valptr
113113
ret void

‎llvm/test/CodeGen/EraVM/shr.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ define i256 @shrcrr(i256 %rs1) nounwind {
3636

3737
; CHECK-LABEL: shrcrr_cp
3838
define i256 @shrcrr_cp(i256 %rs1) nounwind {
39-
; CHECK: shr r2, r1, r1
39+
; CHECK: shr @CPI4_0[0], r1, r1
4040
%res = lshr i256 123456789, %rs1
4141
ret i256 %res
4242
}
@@ -107,7 +107,7 @@ define void @shrcrs(i256 %rs1) nounwind {
107107
; CHECK-LABEL: shrcrs_cp
108108
define void @shrcrs_cp(i256 %rs1) nounwind {
109109
%valptr = alloca i256
110-
; CHECK: shr r2, r1, stack-[1]
110+
; CHECK: shr @CPI12_0[0], r1, stack-[1]
111111
%res = lshr i256 123456789, %rs1
112112
store i256 %res, i256* %valptr
113113
ret void

‎llvm/test/CodeGen/EraVM/sub.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ define i256 @subcrr(i256 %rs1) nounwind {
4343

4444
; CHECK-LABEL: subcrr_cp
4545
define i256 @subcrr_cp(i256 %rs1) nounwind {
46-
; CHECK: sub r2, r1, r1
46+
; CHECK: sub @CPI5_0[0], r1, r1
4747
%res = sub i256 123456789, %rs1
4848
ret i256 %res
4949
}
@@ -114,7 +114,7 @@ define void @subcrs(i256 %rs1) nounwind {
114114
; CHECK-LABEL: subcrs_cp
115115
define void @subcrs_cp(i256 %rs1) nounwind {
116116
%valptr = alloca i256
117-
; CHECK: sub r2, r1, stack-[1]
117+
; CHECK: sub @CPI13_0[0], r1, stack-[1]
118118
%res = sub i256 123456789, %rs1
119119
store i256 %res, i256* %valptr
120120
ret void

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