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Differentiate between replace and replace+delete #22

@matth2k

Description

@matth2k

The API has no way to differentiate between the two behaviors, making it hard to insert gates in place.

See

fn test_replace2() {
let netlist = get_simple_example();
let input = netlist.inputs().next().unwrap();
let inverter = Gate::new_logical("INV".into(), vec!["I".into()], "O".into());
let inverted = netlist
.insert_gate_disconnected(inverter, "inst_0".into())
.unwrap();
// This errors, because input is not safe to delete. No replace is done.
assert!(
netlist
.replace_net_uses(input.clone().unwrap(), &inverted)
.is_err()
);
inverted.find_input(&"I".into()).unwrap().connect(input);
assert_verilog_eq!(

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