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Ethernet working on STM32H5!
1 parent 07b9569 commit 289bcb9

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11 files changed

+68
-106
lines changed

11 files changed

+68
-106
lines changed

connectivity/drivers/emac/TARGET_STM/TARGET_STM32H5/TARGET_NUCLEO_H563ZI/CMakeLists.txt

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,6 @@
22
# SPDX-License-Identifier: Apache-2.0
33

44
target_sources(mbed-emac
5-
PUBLIC
6-
stm32h7_eth_init.c
5+
PRIVATE
6+
stm32h5_eth_init.c
77
)
Lines changed: 39 additions & 61 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/* mbed Microcontroller Library
2-
* Copyright (c) 2022, STMicroelectronics
2+
* Copyright (c) 2025, STMicroelectronics
33
* All rights reserved.
44
*
55
* SPDX-License-Identifier: Apache-2.0
@@ -32,88 +32,55 @@
3232
#include "platform/mbed_critical.h"
3333
#include "PinNames.h"
3434

35-
#define RMII_MDC_Pin GPIO_PIN_1
36-
#define RMII_MDC_GPIO_Port GPIOC
37-
#define RMII_REF_CLK_Pin GPIO_PIN_1
38-
#define RMII_REF_CLK_GPIO_Port GPIOA
39-
#define RMII_MDIO_Pin GPIO_PIN_2
40-
#define RMII_MDIO_GPIO_Port GPIOA
41-
#define RMII_CRS_DV_Pin GPIO_PIN_7
42-
#define RMII_CRS_DV_GPIO_Port GPIOA
43-
#define RMII_RXD0_Pin GPIO_PIN_4
44-
#define RMII_RXD0_GPIO_Port GPIOC
45-
#define RMII_RXD1_Pin GPIO_PIN_5
46-
#define RMII_RXD1_GPIO_Port GPIOC
47-
#define RMII_TXD1_Pin GPIO_PIN_13
48-
#define RMII_TXD1_GPIO_Port GPIOB
49-
#define TMS_Pin GPIO_PIN_13
50-
#define TMS_GPIO_Port GPIOA
51-
#define TCK_Pin GPIO_PIN_14
52-
#define TCK_GPIO_Port GPIOA
53-
#define RMII_TX_EN_Pin GPIO_PIN_11
54-
#define RMII_TX_EN_GPIO_Port GPIOG
55-
#define RMII_TXD0_Pin GPIO_PIN_13
56-
#define RMII_TXD0_GPIO_Port GPIOG
57-
5835
/**
5936
* Override HAL Eth Init function
6037
*/
6138
void EthInitPinmappings(void)
6239
{
63-
GPIO_InitTypeDef GPIO_InitStruct;
64-
65-
/* GPIO Ports Clock Enable */
66-
__HAL_RCC_GPIOH_CLK_ENABLE();
67-
__HAL_RCC_GPIOC_CLK_ENABLE();
68-
__HAL_RCC_GPIOA_CLK_ENABLE();
69-
__HAL_RCC_GPIOB_CLK_ENABLE();
70-
__HAL_RCC_GPIOG_CLK_ENABLE();
40+
GPIO_InitTypeDef GPIO_InitStruct = {0};
7141

72-
/* Enable Peripheral clock */
42+
/* Peripheral clock enable */
7343
__HAL_RCC_ETH_CLK_ENABLE();
7444
__HAL_RCC_ETHTX_CLK_ENABLE();
7545
__HAL_RCC_ETHRX_CLK_ENABLE();
7646

47+
__HAL_RCC_GPIOC_CLK_ENABLE();
48+
__HAL_RCC_GPIOA_CLK_ENABLE();
49+
__HAL_RCC_GPIOB_CLK_ENABLE();
50+
__HAL_RCC_GPIOG_CLK_ENABLE();
7751
/**ETH GPIO Configuration
78-
PC1 ------> ETH_MDC
79-
PA1 ------> ETH_REF_CLK
80-
PA2 ------> ETH_MDIO
81-
PA7 ------> ETH_CRS_DV
82-
PC4 ------> ETH_RXD0
83-
PC5 ------> ETH_RXD1
84-
PB13 ------> ETH_TXD1
85-
PG11 ------> ETH_TX_EN
86-
PG13 ------> ETH_TXD0
52+
PC1 ------> ETH_MDC
53+
PA1 ------> ETH_REF_CLK
54+
PA2 ------> ETH_MDIO
55+
PA7 ------> ETH_CRS_DV
56+
PC4 ------> ETH_RXD0
57+
PC5 ------> ETH_RXD1
58+
PB15 ------> ETH_TXD1
59+
PG11 ------> ETH_TX_EN
60+
PG13 ------> ETH_TXD0
8761
*/
88-
GPIO_InitStruct.Pin = RMII_MDC_Pin;
89-
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
90-
GPIO_InitStruct.Pull = GPIO_NOPULL;
91-
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
92-
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
93-
HAL_GPIO_Init(RMII_MDC_GPIO_Port, &GPIO_InitStruct);
94-
95-
GPIO_InitStruct.Pin = RMII_REF_CLK_Pin | RMII_MDIO_Pin | RMII_CRS_DV_Pin;
62+
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
9663
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
9764
GPIO_InitStruct.Pull = GPIO_NOPULL;
9865
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
9966
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
100-
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
67+
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
10168

102-
GPIO_InitStruct.Pin = RMII_RXD0_Pin | RMII_RXD1_Pin;
69+
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
10370
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
10471
GPIO_InitStruct.Pull = GPIO_NOPULL;
10572
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
10673
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
107-
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
74+
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
10875

109-
GPIO_InitStruct.Pin = RMII_TXD1_Pin;
76+
GPIO_InitStruct.Pin = GPIO_PIN_15;
11077
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
11178
GPIO_InitStruct.Pull = GPIO_NOPULL;
11279
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
11380
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
114-
HAL_GPIO_Init(RMII_TXD1_GPIO_Port, &GPIO_InitStruct);
81+
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
11582

116-
GPIO_InitStruct.Pin = RMII_TX_EN_Pin | RMII_TXD0_Pin;
83+
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_13;
11784
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
11885
GPIO_InitStruct.Pull = GPIO_NOPULL;
11986
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
@@ -126,18 +93,29 @@ void EthInitPinmappings(void)
12693
*/
12794
void EthDeinitPinmappings()
12895
{
129-
/* Disable Peripheral clock */
96+
/* Peripheral clock disable */
13097
__HAL_RCC_ETH_CLK_DISABLE();
13198
__HAL_RCC_ETHTX_CLK_DISABLE();
13299
__HAL_RCC_ETHRX_CLK_DISABLE();
133100

134-
HAL_GPIO_DeInit(GPIOC, RMII_MDC_Pin | RMII_RXD0_Pin | RMII_RXD1_Pin);
101+
/**ETH GPIO Configuration
102+
PC1 ------> ETH_MDC
103+
PA1 ------> ETH_REF_CLK
104+
PA2 ------> ETH_MDIO
105+
PA7 ------> ETH_CRS_DV
106+
PC4 ------> ETH_RXD0
107+
PC5 ------> ETH_RXD1
108+
PB15 ------> ETH_TXD1
109+
PG11 ------> ETH_TX_EN
110+
PG13 ------> ETH_TXD0
111+
*/
112+
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
135113

136-
HAL_GPIO_DeInit(GPIOA, RMII_REF_CLK_Pin | RMII_MDIO_Pin | RMII_CRS_DV_Pin);
114+
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);
137115

138-
HAL_GPIO_DeInit(RMII_TXD1_GPIO_Port, RMII_TXD1_Pin);
116+
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_15);
139117

140-
HAL_GPIO_DeInit(GPIOG, RMII_TX_EN_Pin | RMII_TXD0_Pin);
118+
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11|GPIO_PIN_13);
141119
}
142120

143121
// Get Ethernet PHY reset pin

connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/TARGET_NUCLEO_H723ZG/CMakeLists.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,6 @@
22
# SPDX-License-Identifier: Apache-2.0
33

44
target_sources(mbed-emac
5-
INTERFACE
5+
PRIVATE
66
stm32h7_eth_init.c
77
)

connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/TARGET_NUCLEO_H743ZI2/CMakeLists.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,6 @@
22
# SPDX-License-Identifier: Apache-2.0
33

44
target_sources(mbed-emac
5-
PUBLIC
5+
PRIVATE
66
stm32h7_eth_init.c
77
)

connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/TARGET_NUCLEO_H743ZI2/stm32h7_eth_init.c

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,6 @@
3232
#include "platform/mbed_critical.h"
3333
#include "PinNames.h"
3434

35-
#define MCO_Pin GPIO_PIN_0
36-
#define MCO_GPIO_Port GPIOH
3735
#define RMII_MDC_Pin GPIO_PIN_1
3836
#define RMII_MDC_GPIO_Port GPIOC
3937
#define RMII_REF_CLK_Pin GPIO_PIN_1
@@ -48,10 +46,6 @@
4846
#define RMII_RXD1_GPIO_Port GPIOC
4947
#define RMII_TXD1_Pin GPIO_PIN_13
5048
#define RMII_TXD1_GPIO_Port GPIOB
51-
#define TMS_Pin GPIO_PIN_13
52-
#define TMS_GPIO_Port GPIOA
53-
#define TCK_Pin GPIO_PIN_14
54-
#define TCK_GPIO_Port GPIOA
5549
#define RMII_TX_EN_Pin GPIO_PIN_11
5650
#define RMII_TX_EN_GPIO_Port GPIOG
5751
#define RMII_TXD0_Pin GPIO_PIN_13

connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/TARGET_PORTENTA_H7/CMakeLists.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,6 @@
22
# SPDX-License-Identifier: Apache-2.0
33

44
target_sources(mbed-emac
5-
PUBLIC
5+
PRIVATE
66
stm32h7_eth_init.c
77
)

connectivity/drivers/emac/include/GenericEthDMA.h

Lines changed: 24 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -154,6 +154,8 @@ namespace mbed {
154154
txReclaimIndex = (txReclaimIndex + 1) % MBED_CONF_NSAPI_EMAC_TX_NUM_DESCS;
155155
++txDescsOwnedByApplication;
156156

157+
tr_debug("Reclaimed descriptor %zu", txReclaimIndex);
158+
157159
returnedAnyDescriptors = true;
158160
}
159161

@@ -459,37 +461,39 @@ namespace mbed {
459461
break;
460462
}
461463

462-
if (descriptor.isErrorDesc() ||
463-
(!descriptor.isFirstDesc() && !firstDescIdx.has_value())) {
464-
// Context or error descriptor, or a non-first-descriptor before a first descriptor
464+
if (!firstDescIdx.has_value() && (descriptor.isErrorDesc() || !descriptor.isFirstDesc())) {
465+
// Error or non-first-descriptor before a first descriptor
465466
// (could be caused by incomplete packets/junk in the DMA buffer).
466467
// Ignore, free associated memory, and schedule for rebuild.
467468
memory_manager->free(rxDescStackBufs[descIdx]);
468469
rxDescStackBufs[descIdx] = nullptr;
469470
++rxDescsOwnedByApplication;
470471
++rxNextIndex;
471472

472-
// We should only get one of these error descriptors before the start of the packet, not
473-
// during it.
474-
if(descriptor.isErrorDesc()) {
475-
MBED_ASSERT(!firstDescIdx.has_value());
476-
}
477-
478473
continue;
479474
}
475+
else if(firstDescIdx.has_value() && (descriptor.isErrorDesc() || descriptor.isFirstDesc()))
476+
{
477+
// Already seen a first descriptor, but we have an error descriptor or another first descriptor.
478+
// So, delete the in-progress packet up to this point.
479+
480+
// Clean up the old first descriptor and any descriptors between there and here
481+
const size_t endIdx = descriptor.isFirstDesc() ? descIdx : (descIdx + 1) % RX_NUM_DESCS;
480482

481-
if (descriptor.isFirstDesc()) {
482-
// We should see first descriptor only once and before last descriptor. If this rule is violated, it's likely
483-
// because we ran out of descriptors during receive earlier and the MAC tossed out the rest of the packet.
484-
if(firstDescIdx.has_value()) {
485-
// Clean up the old first descriptor and any descriptors between there and here
486-
for(size_t descToCleanIdx = *firstDescIdx; descToCleanIdx != descIdx; descToCleanIdx = (descToCleanIdx + 1) % RX_NUM_DESCS) {
487-
memory_manager->free(rxDescStackBufs[descToCleanIdx]);
488-
rxDescStackBufs[descToCleanIdx] = nullptr;
489-
++rxDescsOwnedByApplication;
490-
++rxNextIndex;
491-
}
483+
for(size_t descToCleanIdx = *firstDescIdx; descToCleanIdx != endIdx; descToCleanIdx = (descToCleanIdx + 1) % RX_NUM_DESCS) {
484+
memory_manager->free(rxDescStackBufs[descToCleanIdx]);
485+
rxDescStackBufs[descToCleanIdx] = nullptr;
486+
++rxDescsOwnedByApplication;
487+
++rxNextIndex;
492488
}
489+
490+
if(!descriptor.isErrorDesc())
491+
{
492+
firstDescIdx = descIdx;
493+
}
494+
}
495+
else if(descriptor.isFirstDesc())
496+
{
493497
firstDescIdx = descIdx;
494498
}
495499

connectivity/lwipstack/include/lwipstack/LWIPMemoryManager.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,6 @@ class LWIPMemoryManager final : public EMACMemoryManager {
3131

3232
uint32_t get_pool_alloc_unit(uint32_t align) const override;
3333

34-
uint32_t get_pool_size() const override;
35-
3634
void free(net_stack_mem_buf_t *buf) override;
3735

3836
uint32_t get_total_len(const net_stack_mem_buf_t *buf) const override;

connectivity/lwipstack/source/LWIPMemoryManager.cpp

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -51,11 +51,6 @@ uint32_t LWIPMemoryManager::get_pool_alloc_unit(uint32_t align) const
5151
return alloc_unit;
5252
}
5353

54-
uint32_t LWIPMemoryManager::get_pool_size() const
55-
{
56-
return PBUF_POOL_SIZE;
57-
}
58-
5954
void LWIPMemoryManager::free(net_stack_mem_buf_t *buf)
6055
{
6156
pbuf_free(static_cast<struct pbuf *>(buf));

connectivity/nanostack/mbed-mesh-api/source/NanostackMemoryManager.cpp

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -65,11 +65,6 @@ uint32_t NanostackMemoryManager::get_pool_alloc_unit(uint32_t align) const
6565
return MBED_CONF_NSAPI_EMAC_RX_POOL_BUF_SIZE;
6666
}
6767

68-
uint32_t NanostackMemoryManager::get_pool_size() const
69-
{
70-
return MBED_CONF_NSAPI_EMAC_RX_POOL_NUM_BUFS;
71-
}
72-
7368
void NanostackMemoryManager::free(emac_mem_buf_t *mem)
7469
{
7570
ns_dyn_mem_free(mem);

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