Skip to content

Commit 44e5b27

Browse files
committed
revert the changes in system_clock.c of STM32H5
1 parent b19a330 commit 44e5b27

File tree

2 files changed

+2
-40
lines changed

2 files changed

+2
-40
lines changed

targets/TARGET_STM/TARGET_STM32H5/cache.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ void Cache_Init()
2929
/* Disable MPU before perloading and config update */
3030
HAL_MPU_Disable();
3131

32-
/* Configurate 0x00000000-0x08FFF7FF as Read Only, Executable and Cacheable */
32+
/* Configure 0x00000000-0x08FFF7FF as Read Only, Executable and Cacheable */
3333
region.Enable = MPU_REGION_ENABLE;
3434
region.Number = MPU_REGION_NUMBER0;
3535
region.AttributesIndex = MPU_ATTRIBUTES_NUMBER0;
@@ -45,7 +45,7 @@ void Cache_Init()
4545
attr.Attributes = INNER_OUTER(MPU_NOT_CACHEABLE);
4646
HAL_MPU_ConfigMemoryAttributes(&attr);
4747

48-
/* Configurate 0x08FFF800-0X0FFFFFFF as Read Only, Not Executable and Non-cacheable */
48+
/* Configure 0x08FFF800-0X0FFFFFFF as Read Only, Not Executable and Non-cacheable */
4949
region.Enable = MPU_REGION_ENABLE;
5050
region.Number = MPU_REGION_NUMBER5;
5151
region.AttributesIndex = MPU_ATTRIBUTES_NUMBER5;

targets/TARGET_STM/TARGET_STM32H5/clock_cfg/system_clock.c

Lines changed: 0 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -45,43 +45,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
4545
uint8_t SetSysClock_PLL_HSI(void);
4646
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
4747

48-
/**
49-
* @brief Enable ICACHE
50-
* @param None
51-
* @retval None
52-
*/
53-
54-
static void EnableICache()
55-
{
56-
MPU_Attributes_InitTypeDef attr;
57-
MPU_Region_InitTypeDef region;
58-
59-
/* Disable MPU before perloading and config update */
60-
HAL_MPU_Disable();
61-
62-
/* Define cacheable memory via MPU */
63-
attr.Number = MPU_ATTRIBUTES_NUMBER5;
64-
attr.Attributes = INNER_OUTER(MPU_NOT_CACHEABLE);
65-
HAL_MPU_ConfigMemoryAttributes(&attr);
66-
67-
/* BaseAddress-LimitAddress configuration */
68-
region.Enable = MPU_REGION_ENABLE;
69-
region.Number = MPU_REGION_NUMBER5;
70-
region.AttributesIndex = MPU_ATTRIBUTES_NUMBER5;
71-
region.BaseAddress = 0x08FFF800;
72-
region.LimitAddress = 0x08FFFFFF;
73-
region.AccessPermission = MPU_REGION_ALL_RW;
74-
region.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
75-
region.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
76-
HAL_MPU_ConfigRegion(&region);
77-
78-
/* Enable the MPU */
79-
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
80-
81-
/* Enable ICACHE */
82-
HAL_ICACHE_Enable();
83-
}
84-
8548
/**
8649
* @brief Configures the System clock source
8750
* @note This function should be called only once the RCC clock configuration
@@ -111,7 +74,6 @@ void SetSysClock(void)
11174
}
11275
}
11376
}
114-
EnableICache();
11577
}
11678

11779

0 commit comments

Comments
 (0)