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MEDS UET Logo

JPEG-Based Lossy Image Compression System

A hardware-implemented JPEG encoder for efficient lossy image compression using SystemVerilog.

Top-Level Block Diagram

JPEG Encoder Architecture


Key Features

  • Fully synthesizable SystemVerilog implementation of JPEG encoder modules
  • Includes DCT, Quantization, and Huffman Encoding blocks
  • Modular architecture for Y, Cb, and Cr component processing
  • Verified using Cocotb testbenches with Python golden models
  • Supports pipeline optimization and byte-stuffing handling

Getting Started

Clone the Repository

git clone https://github.com/YourUsername/JPEG-Encoder.git
cd JPEG-Encoder

Run JPEG Compression

First do this:

cd sdk

To compress an image, simply run:

run.bat

Quick Links

Category Description Location
Documentation ReadTheDocs Project Page ReadTheDocs
Simulations All testbenches tests/ directory
Modules Each core block (DCT, Quantizer, Huffman, FIFO) rtl/ directory
License Project's license file LICENSE

Full Documentation

For detailed module descriptions, timing diagrams, and verification results, visit:

Full Documentation on ReadTheDocs


Developed at the (MEDS), UET Lahore.

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