chore: add vcd wave display func and ignore rule

Author: maksyuki

.gitignore

@@ -11,4 +11,5 @@ ysyxSoC
 DRAMsim3
 dramsim3.json
 dramsim3.txt
-dramsim3epoch.json
+dramsim3epoch.json
+*.vcd

rtl/Makefile

@@ -239,17 +239,17 @@ socLintCheck: socNameCheck
 	$(MAKE) -C $(YSYXSOC_HOME)/lint/ lint-unused
 	@echo -e "\033[1;32mlint-unused check done\033[0m"
 
-socSimPrevBuild:
+socPrevBuild:
 # FIXME: if only need to moidfy core, commit it
 # @cp $(YSYXSOC_HOME)/soc/ysyxSoCFull.v $(BUILD_DIR)/soc
 	@sed -i s/ysyx_000000/ysyx_210324/g $(BUILD_DIR)/soc/ysyxSoCFull.v
 	verilator $(SOC_FLAGS)
 
-socSimBuild: socSimPrevBuild
+socBuild: socPrevBuild
 	$(MAKE) VM_PARALLEL_BUILDS=1 OPT_FAST="-O3" -C $(SOC_COMPILE_HOME) -f V$(SOC_VSRC_TOP).mk
 
 socSimRun:
-	$(SOC_VSRC_HOME)/emu -i $(YSYXSOC_HOME)/program/bin/flash/hello-flash.bin
+	$(SOC_VSRC_HOME)/emu -i $(YSYXSOC_HOME)/program/bin/flash/hello-flash.bin --dump-wave
 
 ###### clean target ######
 cleanBuild:
@@ -266,5 +266,5 @@ cleanAll: cleanBuild cleanMillOut cleanDepRepo
 
 .PHONY: millTest diffBuild help compile bsp reformat checkformat \
 		nemuBuild difftestBuild riscvTestBuild cpuTestBuild amTestBuild demoTest \
-		socTopModify socNameCheck socSimBuild\
+		socTopModify socNameCheck socBuild\
 		cleanBuild cleanMillOut cleanDepRepo cleanAll