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Upgrade cpuinfo version and update some CPU feature detection code #26598

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Upgrade cpuinfo version and update some CPU feature detection code #26598

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ab32074
Upgrade cpuinfo version. Update ARM64 Windows feature detection to us…
edgchen1 Nov 18, 2025
6a9cfc7
add MlasIsDynamicQGemmAvailable() function, use that instead of check…
edgchen1 Nov 19, 2025
a18cdca
bump cpuinfo to 403d652dca4c1046e8145950b1c0997a9f748b57 to get asan …
edgchen1 Nov 19, 2025
e2ddd85
fix indent
edgchen1 Nov 19, 2025
cb7bbd6
debug - print has_fp16_ value
edgchen1 Nov 19, 2025
9b186b2
add note about has_fp16_ workaround, remove debug print
edgchen1 Nov 20, 2025
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2 changes: 1 addition & 1 deletion cmake/deps.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ protoc_mac_universal;https://github.com/protocolbuffers/protobuf/releases/downlo
psimd;https://github.com/Maratyszcza/psimd/archive/072586a71b55b7f8c584153d223e95687148a900.zip;1f5454b01f06f9656b77e4a5e2e31d7422487013
pthreadpool;https://github.com/google/pthreadpool/archive/dcc9f28589066af0dbd4555579281230abbf74dd.zip;533a77943203ef15ca608bcd9dbe2c94da7451d2
pybind11;https://github.com/pybind/pybind11/archive/refs/tags/v2.13.6.zip;f780292da9db273c8ef06ccf5fd4b623624143e9
pytorch_cpuinfo;https://github.com/pytorch/cpuinfo/archive/877328f188a3c7d1fa855871a278eb48d530c4c0.zip;9152d4bf6b8bde9f19b116de3bd8a745097ed9df
pytorch_cpuinfo;https://github.com/pytorch/cpuinfo/archive/f858c30bcb16f8effd5ff46996f0514539e17abc.zip;66a964eda7de60c925e2e26f71f9bbe31698997b
re2;https://github.com/google/re2/archive/refs/tags/2024-07-02.zip;646e1728269cde7fcef990bf4a8e87b047882e88
safeint;https://github.com/dcleblanc/SafeInt/archive/refs/tags/3.0.28.zip;23f252040ff6cb9f1fd18575b32fa8fb5928daac
tensorboard;https://github.com/tensorflow/tensorboard/archive/373eb09e4c5d2b3cc2493f0949dc4be6b6a45e81.zip;67b833913605a4f3f499894ab11528a702c2b381
Expand Down
4 changes: 2 additions & 2 deletions cmake/vcpkg-ports/cpuinfo/portfile.cmake
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Expand Up @@ -6,8 +6,8 @@ endif()
vcpkg_from_github(
OUT_SOURCE_PATH SOURCE_PATH
REPO pytorch/cpuinfo
REF 877328f188a3c7d1fa855871a278eb48d530c4c0
SHA512 b6d5a9ce9996eee3b2f09f39115f7ae178fe4d4814cc35b049a59d04a82228e268aa52d073c307ccb56a427428622940e1c77f004c99851dfca0d3a5d803658b
REF f858c30bcb16f8effd5ff46996f0514539e17abc
SHA512 cd7c0c1ea59fac69f2746f65f59656798eeb87410c304ac9d3b3d26ebea4f4124d1426c10fb4b87ff5f93f367ea10d63337f519ee3c3f8fefbb4b7ebf6438130
HEAD_REF master
PATCHES
patch_cpuinfo_h_for_arm64ec.patch
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33 changes: 8 additions & 25 deletions onnxruntime/core/common/cpuid_info.cc
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Expand Up @@ -237,9 +237,9 @@
#elif defined(_WIN32) // ^ defined(__linux__)

void CPUIDInfo::ArmWindowsInit() {
// Read MIDR and ID_AA64ISAR1_EL1 register values from Windows registry
// Read MIDR register values from Windows registry
// There should be one per CPU
std::vector<uint64_t> midr_values{}, id_aa64isar1_el1_values{};
std::vector<uint64_t> midr_values{};

Check warning on line 242 in onnxruntime/core/common/cpuid_info.cc

View workflow job for this annotation

GitHub Actions / Optional Lint C++ 

[cpplint] reported by reviewdog 🐶
 Add #include <vector> for vector<>  [build/include_what_you_use] [4]

Raw Output:
onnxruntime/core/common/cpuid_info.cc:242:  Add #include <vector> for vector<>  [build/include_what_you_use] [4]

// TODO!! Don't support multiple processor group yet!!
constexpr int MAX_CORES = 64;
Expand Down Expand Up @@ -272,17 +272,7 @@
break;
}

uint64_t id_aa64isar1_el1_value;
data_size = sizeof(id_aa64isar1_el1_value);

// CP 4031 corresponds to ID_AA64ISAR1_EL1 register
if (::RegGetValueA(HKEY_LOCAL_MACHINE, processor_subkey, "CP 4031", RRF_RT_REG_QWORD,
nullptr, &id_aa64isar1_el1_value, &data_size) != ERROR_SUCCESS) {
break;
}

midr_values.push_back(midr_value);
id_aa64isar1_el1_values.push_back(id_aa64isar1_el1_value);
}

// process midr_values
Expand All @@ -308,22 +298,15 @@
}
}

has_arm_neon_i8mm_ = std::all_of(
id_aa64isar1_el1_values.begin(), id_aa64isar1_el1_values.end(),
[](uint64_t id_aa64isar1_el1_value) {
// I8MM, bits [55:52]
return ((id_aa64isar1_el1_value >> 52) & 0xF) != 0;
});

has_arm_neon_dot_ = (IsProcessorFeaturePresent(PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE) != 0);

#if defined(CPUINFO_SUPPORTED)
if (pytorch_cpuinfo_init_) {
has_arm_neon_dot_ = cpuinfo_has_arm_neon_dot();
has_fp16_ = cpuinfo_has_arm_neon_fp16_arith();
// cpuinfo_has_arm_i8mm() doesn't work on Windows yet. See https://github.com/pytorch/cpuinfo/issues/279.
// has_arm_neon_i8mm_ = cpuinfo_has_arm_i8mm();
has_arm_sve_i8mm_ = cpuinfo_has_arm_sve() && has_arm_neon_i8mm_;
has_arm_neon_i8mm_ = cpuinfo_has_arm_i8mm();
has_arm_sve_i8mm_ = cpuinfo_has_arm_sve() && cpuinfo_has_arm_i8mm();
has_arm_neon_bf16_ = cpuinfo_has_arm_neon_bf16();
has_arm_sme_ = cpuinfo_has_arm_sme();
has_arm_sme2_ = cpuinfo_has_arm_sme2();
}
#endif // defined(CPUINFO_SUPPORTED)
}
Expand Down Expand Up @@ -397,4 +380,4 @@
#endif
#endif // defined(CPUIDINFO_ARCH_ARM)
}
} // namespace onnxruntime
} // namespace onnxruntime
2 changes: 1 addition & 1 deletion onnxruntime/core/common/cpuid_info.h
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Expand Up @@ -171,4 +171,4 @@ class CPUIDInfo {
uint32_t vendor_id_;
};

} // namespace onnxruntime
} // namespace onnxruntime
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