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openhcl/virt_mshv_vtl: On TDX, always report that MCE,MCA,MTRR CPUID bits are set regardless of what the hardware says #2142

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openhcl/virt_mshv_vtl: On TDX, always report that MCE,MCA,MTRR CPUID bits are set regardless of what the hardware says #2142

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22 changes: 21 additions & 1 deletion openhcl/virt_mshv_vtl/src/cvm_cpuid/tdx.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -160,7 +160,27 @@ impl CpuidArchInitializer for TdxCpuidInitializer<'_> {
.into_iter()
.map(|(leaf, subleaf)| {
let subleaf = subleaf.unwrap_or(0);
let result = Self::cpuid(leaf.0, subleaf);
let mut result = Self::cpuid(leaf.0, subleaf);

// Apply TDX specific fixups.
match leaf {
// Always tell the guest that MCE, MCA, and MTRR are supported.
CpuidFunction::VersionAndFeatures => {
let mut features = cpuid::VersionAndFeaturesEdx::from(result.edx);
features.set_mce(true);
features.set_mca(true);
features.set_mtrr(true);
result.edx = features.into();
}
CpuidFunction::ExtendedVersionAndFeatures => {
let mut features = cpuid::ExtendedVersionAndFeaturesEdx::from(result.edx);
features.set_mce(true);
features.set_mca(true);
features.set_mtrr(true);
result.edx = features.into();
}
_ => {}
}

ParsedCpuidEntry {
leaf,
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