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AMX-TRANSPOSE removed #141

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251ba78
AMX-TRANSPOSE removed
InstLatx64 Oct 9, 2025
1a77050
travis\test\amx.asm fix
InstLatx64 Oct 9, 2025
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89 changes: 47 additions & 42 deletions test/amx.asm
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Original file line number Diff line number Diff line change
Expand Up @@ -56,48 +56,53 @@
tilemovrow zreg, treg, eax ;AMX-AVX512
tilemovrow zreg, treg, %1 ;AMX-AVX512

t2rpntlvwz0 treg, [rax] ;AMX-TRANSPOSE
t2rpntlvwz0 treg, [rax+rdx] ;AMX-TRANSPOSE
t2rpntlvwz0 treg, [rax+rdx*2] ;AMX-TRANSPOSE

t2rpntlvwz0t1 treg, [rax] ;AMX-TRANSPOSE
t2rpntlvwz0t1 treg, [rax+rdx] ;AMX-TRANSPOSE
t2rpntlvwz0t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

t2rpntlvwz1 treg, [rax] ;AMX-TRANSPOSE
t2rpntlvwz1 treg, [rax+rdx] ;AMX-TRANSPOSE
t2rpntlvwz1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

t2rpntlvwz1t1 treg, [rax] ;AMX-TRANSPOSE
t2rpntlvwz1t1 treg, [rax+rdx] ;AMX-TRANSPOSE
t2rpntlvwz1t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

ttransposed treg, treg ;AMX-TRANSPOSE

t2rpntlvwz0rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz0rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz0rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

t2rpntlvwz0rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz0rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz0rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

t2rpntlvwz1rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz1rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz1rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

t2rpntlvwz1rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz1rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz1rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

ttdpbf16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-BF16
ttdpfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-FP16
ttcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
ttcmmrlfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
tconjtcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
tconjtfp16 treg, treg ;AMX-TRANSPOSE + AMX-COMPLEX

ttmmultf32ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX_TF32
; All the 16 AMX-TRANSPOSE instructions were removed from the 59th edition of
; "Intel Architecture Instruction Set Extensions and Future Features Programming Reference"
; September 2025, 319433-059
; Similar to PCOMMIT, they are tagged as 'NEVER'
;
;t2rpntlvwz0 treg, [rax] ;AMX-TRANSPOSE
;t2rpntlvwz0 treg, [rax+rdx] ;AMX-TRANSPOSE
;t2rpntlvwz0 treg, [rax+rdx*2] ;AMX-TRANSPOSE

;t2rpntlvwz0t1 treg, [rax] ;AMX-TRANSPOSE
;t2rpntlvwz0t1 treg, [rax+rdx] ;AMX-TRANSPOSE
;t2rpntlvwz0t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

;t2rpntlvwz1 treg, [rax] ;AMX-TRANSPOSE
;t2rpntlvwz1 treg, [rax+rdx] ;AMX-TRANSPOSE
;t2rpntlvwz1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

;t2rpntlvwz1t1 treg, [rax] ;AMX-TRANSPOSE
;t2rpntlvwz1t1 treg, [rax+rdx] ;AMX-TRANSPOSE
;t2rpntlvwz1t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

;ttransposed treg, treg ;AMX-TRANSPOSE

;t2rpntlvwz0rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz0rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz0rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

;t2rpntlvwz0rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz0rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz0rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

;t2rpntlvwz1rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz1rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz1rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

;t2rpntlvwz1rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz1rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz1rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

;ttdpbf16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-BF16
;ttdpfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-FP16
;ttcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
;ttcmmrlfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
;tconjtcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
;tconjtfp16 treg, treg ;AMX-TRANSPOSE + AMX-COMPLEX

;ttmmultf32ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX_TF32

tilestored [rax], treg ;AMX_TILE
tilestored [rax,rdx], treg ;AMX_TILE
Expand Down
89 changes: 47 additions & 42 deletions travis/test/amx.asm
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Original file line number Diff line number Diff line change
Expand Up @@ -56,48 +56,53 @@
tilemovrow zreg, treg, eax ;AMX-AVX512
tilemovrow zreg, treg, %1 ;AMX-AVX512

t2rpntlvwz0 treg, [rax] ;AMX-TRANSPOSE
t2rpntlvwz0 treg, [rax+rdx] ;AMX-TRANSPOSE
t2rpntlvwz0 treg, [rax+rdx*2] ;AMX-TRANSPOSE

t2rpntlvwz0t1 treg, [rax] ;AMX-TRANSPOSE
t2rpntlvwz0t1 treg, [rax+rdx] ;AMX-TRANSPOSE
t2rpntlvwz0t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

t2rpntlvwz1 treg, [rax] ;AMX-TRANSPOSE
t2rpntlvwz1 treg, [rax+rdx] ;AMX-TRANSPOSE
t2rpntlvwz1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

t2rpntlvwz1t1 treg, [rax] ;AMX-TRANSPOSE
t2rpntlvwz1t1 treg, [rax+rdx] ;AMX-TRANSPOSE
t2rpntlvwz1t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

ttransposed treg, treg ;AMX-TRANSPOSE

t2rpntlvwz0rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz0rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz0rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

t2rpntlvwz0rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz0rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz0rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

t2rpntlvwz1rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz1rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz1rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

t2rpntlvwz1rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz1rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
t2rpntlvwz1rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

ttdpbf16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-BF16
ttdpfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-FP16
ttcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
ttcmmrlfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
tconjtcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
tconjtfp16 treg, treg ;AMX-TRANSPOSE + AMX-COMPLEX

ttmmultf32ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX_TF32
; All the 16 AMX-TRANSPOSE instructions were removed from the 59th edition of
; "Intel Architecture Instruction Set Extensions and Future Features Programming Reference"
; September 2025, 319433-059
; Similar to PCOMMIT, they are tagged as 'NEVER'
;
;t2rpntlvwz0 treg, [rax] ;AMX-TRANSPOSE
;t2rpntlvwz0 treg, [rax+rdx] ;AMX-TRANSPOSE
;t2rpntlvwz0 treg, [rax+rdx*2] ;AMX-TRANSPOSE

;t2rpntlvwz0t1 treg, [rax] ;AMX-TRANSPOSE
;t2rpntlvwz0t1 treg, [rax+rdx] ;AMX-TRANSPOSE
;t2rpntlvwz0t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

;t2rpntlvwz1 treg, [rax] ;AMX-TRANSPOSE
;t2rpntlvwz1 treg, [rax+rdx] ;AMX-TRANSPOSE
;t2rpntlvwz1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

;t2rpntlvwz1t1 treg, [rax] ;AMX-TRANSPOSE
;t2rpntlvwz1t1 treg, [rax+rdx] ;AMX-TRANSPOSE
;t2rpntlvwz1t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE

;ttransposed treg, treg ;AMX-TRANSPOSE

;t2rpntlvwz0rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz0rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz0rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

;t2rpntlvwz0rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz0rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz0rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

;t2rpntlvwz1rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz1rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz1rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

;t2rpntlvwz1rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz1rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
;t2rpntlvwz1rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS

;ttdpbf16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-BF16
;ttdpfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-FP16
;ttcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
;ttcmmrlfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
;tconjtcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
;tconjtfp16 treg, treg ;AMX-TRANSPOSE + AMX-COMPLEX

;ttmmultf32ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX_TF32

tilestored [rax], treg ;AMX_TILE
tilestored [rax,rdx], treg ;AMX_TILE
Expand Down
1 change: 0 additions & 1 deletion x86/iflags.ph
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Expand Up @@ -162,7 +162,6 @@ if_("AMXINT8", "AMX 8-bit integer multiplication");
if_("AMXCOMPLEX", "AMX float16 complex multiplication");
if_("AMXAVX512", "EVEX zmm<-tmm conversion instructions");
if_("AMXMOVRS", "AMX loads with MOVRS hint");
if_("AMXTRANSPOSE", "AMX transpose instructions");
if_("FRED", "Flexible Return and Exception Delivery (FRED)");
if_("RAOINT", "Remote atomic operations (RAO-INT)");
if_("UINTR", "User interrupts");
Expand Down
34 changes: 17 additions & 17 deletions x86/insns.dat
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Expand Up @@ -5401,17 +5401,17 @@ TILEZERO tmmreg [r: vex.128.f2.0f38.w0 49 /3r0] AMXTILE,LONG
TILELOADDRS tmmreg,mem [rm: vex+.128.f2.0f38.w0 4a /r] AMXMOVRS,APX,AMXTILE,FUTURE,MIB,SIB,ANYSIZE,AR1,LONG
TILELOADDRST1 tmmreg,mem [rm: vex+.128.66.0f38.w0 4a /r] AMXMOVRS,APX,AMXTILE,FUTURE,MIB,SIB,ANYSIZE,AR1,LONG

T2RPNTLVWZ0 tmmreg,mem [rm: vex.128.np.0f38.w0 6e /r] FUTURE,SIB
T2RPNTLVWZ0T1 tmmreg,mem [rm: vex.128.np.0f38.w0 6f /r] FUTURE,SIB
T2RPNTLVWZ1 tmmreg,mem [rm: vex.128.66.0f38.w0 6e /r] FUTURE,SIB
T2RPNTLVWZ1T1 tmmreg,mem [rm: vex.128.66.0f38.w0 6f /r] FUTURE,SIB
T2RPNTLVWZ0RS tmmreg,mem [rm: vex.128.np.map5.w0 f8 /r] FUTURE,SIB
T2RPNTLVWZ0RST1 tmmreg,mem [rm: vex.128.np.map5.w0 f9 /r] FUTURE,SIB
T2RPNTLVWZ1RS tmmreg,mem [rm: vex.128.66.map5.w0 f8 /r] FUTURE,SIB
T2RPNTLVWZ1RST1 tmmreg,mem [rm: vex.128.66.map5.w0 f9 /r] FUTURE,SIB

TCONJTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 6b /r] FUTURE
TCONJTFP16 tmmreg,tmmreg [rm: vex.128.66.0f38.w0 6b /r] FUTURE
T2RPNTLVWZ0 tmmreg,mem [rm: vex.128.np.0f38.w0 6e /r] NEVER,SIB
T2RPNTLVWZ0T1 tmmreg,mem [rm: vex.128.np.0f38.w0 6f /r] NEVER,SIB
T2RPNTLVWZ1 tmmreg,mem [rm: vex.128.66.0f38.w0 6e /r] NEVER,SIB
T2RPNTLVWZ1T1 tmmreg,mem [rm: vex.128.66.0f38.w0 6f /r] NEVER,SIB
T2RPNTLVWZ0RS tmmreg,mem [rm: vex.128.np.map5.w0 f8 /r] NEVER,SIB
T2RPNTLVWZ0RST1 tmmreg,mem [rm: vex.128.np.map5.w0 f9 /r] NEVER,SIB
T2RPNTLVWZ1RS tmmreg,mem [rm: vex.128.66.map5.w0 f8 /r] NEVER,SIB
T2RPNTLVWZ1RST1 tmmreg,mem [rm: vex.128.66.map5.w0 f9 /r] NEVER,SIB

TCONJTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 6b /r] NEVER
TCONJTFP16 tmmreg,tmmreg [rm: vex.128.66.0f38.w0 6b /r] NEVER
TCVTROWD2PS zmmreg,tmmreg,reg32 [rmv: evex.512.f3.0f38.w0 4a /r] AMXAVX512
TCVTROWD2PS zmmreg,tmmreg,imm8 [rmi: evex.512.f3.0f3a.w0 07 /r ib] AMXAVX512
TCVTROWPS2BF16H zmmreg,tmmreg,reg32 [rmv: evex.512.f2.0f38.w0 6d /r] AMXAVX512
Expand All @@ -5429,12 +5429,12 @@ TDPHF8PS tmmreg,tmmreg,tmmreg [rmv: vex.128.66.map5.w0 fd /r] AMXFP8
TILEMOVROW zmmreg,tmmreg,imm8 [rmi: evex.512.66.0f3a.w0 07 /r ib] AMXAVX512
TILEMOVROW zmmreg,tmmreg,reg32 [rmv: evex.512.66.0f38.w0 4a /r] AMXAVX512
TMMULTF32PS tmmreg,tmmreg,tmmreg [rmv: vex.128.66.0f38.w0 48 /r] AMXTF32
TTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6b /r] FUTURE
TTCMMRLFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6b /r] FUTURE
TTDPBF16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6c /r] FUTURE
TTDPFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6c /r] FUTURE
TTMMULTF32PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 48 /r] FUTURE
TTRANSPOSED tmmreg,tmmreg [rm: vex.128.f3.0f38.w0 5f /r] FUTURE
TTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6b /r] NEVER
TTCMMRLFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6b /r] NEVER
TTDPBF16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6c /r] NEVER
TTDPFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6c /r] NEVER
TTMMULTF32PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 48 /r] NEVER
TTRANSPOSED tmmreg,tmmreg [rm: vex.128.f3.0f38.w0 5f /r] NEVER

;# Intel AVX512-FP16 instructions
VADDPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5.w0 58 /r] AVX512FP16,AVX512VL
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