Move from size to limit for kbl and mtl tpm configs

npmitche · npmitche · commit c137490b2b29 · 2025-03-03T12:29:35.000-08:00
Signed-off-by: Nathaniel Mitchell &lt;nathaniel.p.mitchell@intel.com&gt;
diff --git a/chipsec/cfg/8086/kbl.xml b/chipsec/cfg/8086/kbl.xml
@@ -42,7 +42,7 @@ chipsec@intel.com
   </msr>
 
   <memory>
-    <range name="TPM" access="mmio" address="0xFED40000" size="0x10000" config="TPM.tpm12.xml" />
+    <range name="TPM" access="mmio" address="0xFED40000" limit="0xFED4FFFF" config="TPM.tpm12.xml" />
   </memory>
 
 </configuration>
diff --git a/chipsec/cfg/8086/mtl.xml b/chipsec/cfg/8086/mtl.xml
@@ -57,7 +57,7 @@ chipsec@intel.com
   <!--                                      -->
   <!-- #################################### -->
   <memory>
-    <range name="TPM" access="mmio" address="0xFED40000" size="0x10000" config="TPM.tpm12.xml" />
+    <range name="TPM" access="mmio" address="0xFED40000" limit="0xFED4FFFF" config="TPM.tpm12.xml" />
   </memory>
 
 </configuration>
