Add fix to interrupts_cmd

Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>

Author: npmitche

chipsec/hal/common/iobar.py

@@ -60,9 +60,12 @@ def is_IO_BAR_defined(self, bar_name: str) -> bool:
     #
     def get_IO_BAR_base_address(self, bar_name: str, instance) -> Tuple[int, int]:
         reglist = self.cs.register.get_list_by_name(bar_name)
-        bar = reglist[0].get_def(bar_name)
+        try:
+            bar = reglist[0].get_def(bar_name)
+        except IndexError:
+            raise IOBARNotFoundError(f'IOBARNotFound: {bar_name} is not defined. Check scoping and configuration')
         if not bar:
-            raise IOBARNotFoundError(f'IOBARNotFound: {bar_name}')
+            raise IOBARNotFoundError(f'IOBARNotFound: {bar_name} is not defined. Check scoping and configuration')
         base = 0
         empmty_base = 0
 

chipsec/hal/common/mmio.py

@@ -45,7 +45,7 @@
 """
 from typing import List, Optional, Tuple
 from chipsec.hal import hal_base
-from chipsec.library.exceptions import CSReadError
+from chipsec.library.exceptions import CSReadError, MMIOBARNotFoundError
 from chipsec.library.logger import logger
 from chipsec.library.defines import get_bits, is_all_ones
 
@@ -193,11 +193,12 @@ def flush_bar_address_cache(self) -> None:
     def get_MMIO_BAR_base_address(self, bar_name: str, pciobj: Optional[int] = None) -> Tuple[int, int]:
         if self.cache_bar_addresses_resolution and (bar_name, pciobj) in self.cached_bar_addresses:
             return self.cached_bar_addresses[(bar_name, pciobj)]
-        bar = self.cs.register.mmio.get_def(bar_name)  #self.cs.Cfg.MMIO_BARS[bar_name]
-        # if bar is None or bar == {}:
-        #     return -1, -1
+        try:
+            bar = self.cs.register.mmio.get_def(bar_name)  #self.cs.Cfg.MMIO_BARS[bar_name]
+        except KeyError:
+            raise MMIOBARNotFoundError(f'MMIOBARNotFound: {bar_name} is not defined. Check scoping and configuration')
         if not bar:
-            raise CSReadError(f'{bar_name} is not defined. check scoping and configuration')
+            raise MMIOBARNotFoundError(f'MMIOBARNotFound: {bar_name} is not defined. Check scoping and configuration')
         base, size = bar.get_base(pciobj)
         if base:
             return base, size

chipsec/library/exceptions.py

@@ -110,6 +110,8 @@ class IOBARRuntimeError (RuntimeError):
 class IOBARNotFoundError (RuntimeError):
     pass
 
+class MMIOBARNotFoundError (RuntimeError):
+    pass
 
 class IOMMUError (RuntimeError):
     pass

chipsec/utilcmd/interrupts_cmd.py

@@ -105,9 +105,9 @@ def parse_arguments(self) -> None:
 
     def smi_count(self) -> None:
         self.logger.log("[CHIPSEC] SMI count:")
-        for tid in range(self.cs.hals.Msr.get_cpu_thread_count()):
-            smi_cnt = self.cs.register.read_field('MSR_SMI_COUNT', 'Count', cpu_thread=tid)
-            self.logger.log(f'  CPU{tid:d}: {smi_cnt:d}')
+        smi_cnt = self.cs.register.get_list_by_name('8086.MSR.MSR_SMI_COUNT')
+        for reg in smi_cnt:
+            self.logger.log(f'  CPU{reg.instance:d}: {reg.read_field('Count'):d}')
 
     def smi_smmc(self) -> None:
         if os.path.isfile(self.payload):
@@ -180,7 +180,10 @@ def run(self) -> None:
             return
 
         self.logger.log("[CHIPSEC] Sending NMI#...")
-        interrupts.send_NMI()
+        try:
+            interrupts.send_NMI()
+        except Exception as err:
+            self.logger.log(err)
 
 
 commands = {'smi': SMICommand, 'nmi': NMICommand}