Merge pull request #243 from timokroeger/fix-rtc-event

Fix race condition in RTC event handling

Author: jonas-schievink

examples/rtc-demo/Cargo.toml

@@ -0,0 +1,17 @@
+[package]
+name = "rtc-demo"
+version = "0.1.0"
+authors = ["Timo Kröger"]
+edition = "2018"
+
+# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
+
+[dependencies]
+cortex-m = "0.6.2"
+cortex-m-rt = "0.6.12"
+rtt-target = {version = "0.2.0", features = ["cortex-m"] }
+nrf52840-hal = { features = ["rt"], path = "../../nrf52840-hal" }
+
+[dependencies.embedded-hal]
+version = "0.2.3"
+features = ["unproven"]

examples/rtc-demo/Embed.toml

@@ -0,0 +1,2 @@
+[default.rtt]
+enabled = true

examples/rtc-demo/README.md

@@ -0,0 +1,18 @@
+# RTC demo
+
+This example shows how to use the compare functionality of the real-time counter peripheral.
+Runs on the nRF52840_DK but can easily be adapted for other hardware.
+
+## Set up with `cargo-embed`
+
+Install `cargo-embed` if you don't have it already:
+
+```console
+$ cargo install cargo-embed
+```
+
+Then just `cd` to the example folder and run
+
+```console
+$ cargo embed --target thumbv7em-none-eabihf
+```

examples/rtc-demo/src/main.rs

@@ -0,0 +1,50 @@
+#![no_main]
+#![no_std]
+
+use nrf52840_hal as hal;
+
+use hal::rtc::{Rtc, RtcCompareReg, RtcInterrupt};
+use rtt_target::{rprintln, rtt_init_print};
+
+#[panic_handler] // panicking behavior
+fn panic(_: &core::panic::PanicInfo) -> ! {
+    loop {
+        cortex_m::asm::bkpt();
+    }
+}
+
+#[cortex_m_rt::entry]
+fn main() -> ! {
+    rtt_init_print!();
+
+    let p = hal::pac::Peripherals::take().unwrap();
+
+    // Enable LfClk which is required by the RTC.
+    let clocks = hal::clocks::Clocks::new(p.CLOCK);
+    let clocks = clocks.start_lfclk();
+
+    // Run RTC for 1 second
+    let mut rtc = Rtc::new(p.RTC0);
+    rtc.set_compare(RtcCompareReg::Compare0, 32_768).unwrap();
+    rtc.enable_event(RtcInterrupt::Compare0);
+
+    rprintln!("Starting RTC");
+    let rtc = rtc.enable_counter();
+
+    rprintln!("Waiting for compare match");
+    while !rtc.is_event_triggered(RtcInterrupt::Compare0) {}
+    rtc.reset_event(RtcInterrupt::Compare0);
+
+    rprintln!("Compare match, stopping RTC");
+    let rtc = rtc.disable_counter();
+
+    rprintln!("Counter stopped at {} ticks", rtc.get_counter());
+
+    // Stop LfClk when RTC is not used anymore.
+    rtc.release();
+    clocks.stop_lfclk();
+
+    loop {
+        cortex_m::asm::nop();
+    }
+}

nrf-hal-common/src/rtc.rs

@@ -142,41 +142,43 @@ where
         }
     }
 
-    /// Obtain the state of a given interrupt/event, and optionally clear the event
-    /// if it is set.
-    pub fn get_event_triggered(&mut self, evt: RtcInterrupt, clear_on_read: bool) -> bool {
-        let mut orig = 0;
-        let set_val = if clear_on_read { 0 } else { 1 };
-        match evt {
-            RtcInterrupt::Tick => self.periph.events_tick.modify(|r, w| {
-                orig = r.bits();
-                unsafe { w.bits(set_val) }
-            }),
-            RtcInterrupt::Overflow => self.periph.events_ovrflw.modify(|r, w| {
-                orig = r.bits();
-                unsafe { w.bits(set_val) }
-            }),
-            RtcInterrupt::Compare0 => self.periph.events_compare[0].modify(|r, w| {
-                orig = r.bits();
-                unsafe { w.bits(set_val) }
-            }),
-            RtcInterrupt::Compare1 => self.periph.events_compare[1].modify(|r, w| {
-                orig = r.bits();
-                unsafe { w.bits(set_val) }
-            }),
-            RtcInterrupt::Compare2 => self.periph.events_compare[2].modify(|r, w| {
-                orig = r.bits();
-                unsafe { w.bits(set_val) }
-            }),
-            RtcInterrupt::Compare3 => self.periph.events_compare[3].modify(|r, w| {
-                orig = r.bits();
-                unsafe { w.bits(set_val) }
-            }),
+    /// Checks if the given event has been triggered.
+    pub fn is_event_triggered(&self, evt: RtcInterrupt) -> bool {
+        let orig = match evt {
+            RtcInterrupt::Tick => self.periph.events_tick.read().bits(),
+            RtcInterrupt::Overflow => self.periph.events_ovrflw.read().bits(),
+            RtcInterrupt::Compare0 => self.periph.events_compare[0].read().bits(),
+            RtcInterrupt::Compare1 => self.periph.events_compare[1].read().bits(),
+            RtcInterrupt::Compare2 => self.periph.events_compare[2].read().bits(),
+            RtcInterrupt::Compare3 => self.periph.events_compare[3].read().bits(),
         };
-
         orig == 1
     }
 
+    /// Resets the given event.
+    pub fn reset_event(&self, evt: RtcInterrupt) {
+        match evt {
+            RtcInterrupt::Tick => {
+                self.periph.events_tick.write(|w| unsafe { w.bits(0) });
+            }
+            RtcInterrupt::Overflow => {
+                self.periph.events_ovrflw.write(|w| unsafe { w.bits(0) });
+            }
+            RtcInterrupt::Compare0 => {
+                self.periph.events_compare[0].write(|w| unsafe { w.bits(0) });
+            }
+            RtcInterrupt::Compare1 => {
+                self.periph.events_compare[1].write(|w| unsafe { w.bits(0) });
+            }
+            RtcInterrupt::Compare2 => {
+                self.periph.events_compare[2].write(|w| unsafe { w.bits(0) });
+            }
+            RtcInterrupt::Compare3 => {
+                self.periph.events_compare[3].write(|w| unsafe { w.bits(0) });
+            }
+        };
+    }
+
     /// Set the compare value of a given register. The compare registers have a width
     /// of 24 bits.
     pub fn set_compare(&mut self, reg: RtcCompareReg, val: u32) -> Result<(), Error> {

xtask/src/lib.rs

@@ -28,6 +28,7 @@ pub static EXAMPLES: &[(&str, &[&str])] = &[
     ),
     ("pwm-demo", &[]),
     ("qdec-demo", &[]),
+    ("rtc-demo", &[]),
     ("rtic-demo", &["51", "52810", "52811", "52832", "52840"]),
     ("spi-demo", &[]),
     ("spis-demo", &[]),