snippets: sdp: mspi: add nRF54L15 DK external flash

Add nRF54L15 DK external flash as a MSPI device.

Signed-off-by: Magdalena Pastula <[email protected]>

Author: magp-nordic

snippets/sdp/mspi/app.conf

@@ -2,3 +2,11 @@ CONFIG_MSPI=y
 CONFIG_MBOX=y
 CONFIG_IPC_SERVICE=y
 CONFIG_IPC_SERVICE_BACKEND_ICMSG=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_STDOUT_CONSOLE=y
+CONFIG_PRINTK=y
+CONFIG_EARLY_CONSOLE=y
+
+# additional compiler flags
+CONFIG_COMPILER_OPT="-fshort-enums"

snippets/sdp/mspi/soc/nrf54l15_cpuapp.overlay

@@ -4,32 +4,31 @@
  * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
  */
 
-/ {
+ / {
 	soc {
 		reserved-memory {
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			cpuflpr_code_partition: image@17a000 {
-				reg = <0x17a000 DT_SIZE_K(12)>;
+			cpuflpr_code_partition: image@178000 {
+				reg = <0x178000 DT_SIZE_K(20)>;
 			};
 
-			sram_rx: memory@2003c000 {
-				reg = <0x2003c000 0x0800>;
+			sram_rx: memory@2003a000 {
+				reg = <0x2003a000 0x0800>;
 			};
 
-			sram_tx: memory@2003c800 {
-				reg = <0x2003c800 0x0800>;
+			sram_tx: memory@2003a800 {
+				reg = <0x2003a800 0x0800>;
 			};
 		};
 
-
-		cpuflpr_sram_code_data: memory@2003d000 {
+		cpuflpr_sram_code_data: memory@2003b000 {
 			compatible = "mmio-sram";
-			reg = <0x2003d000 DT_SIZE_K(12)>;
+			reg = <0x2003b000 DT_SIZE_K(20)>;
 			#address-cells = <1>;
 			#size-cells = <1>;
-			ranges = <0x0 0x2003d000 0x3000>;
+			ranges = <0x0 0x2003b000 0x5000>;
 		};
 	};
 
@@ -46,12 +45,12 @@
 };
 
 &cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(1512)>;
+	reg = <0x0 DT_SIZE_K(1504)>;
 };
 
 &cpuapp_sram {
-	reg = <0x20000000 DT_SIZE_K(244)>;
-	ranges = <0x0 0x20000000 0x3d000>;
+	reg = <0x20000000 DT_SIZE_K(232)>;
+	ranges = <0x0 0x20000000 0x3a000>;
 };
 
 &cpuflpr_vpr {
@@ -80,7 +79,7 @@
 				<NRF_PSEL(SDP_MSPI_DQ2, 2, 3)>,
 				<NRF_PSEL(SDP_MSPI_DQ3, 2, 0)>,
 				<NRF_PSEL(SDP_MSPI_CS0, 2, 5)>;
-			nordic,drive-mode = <NRF_DRIVE_E0E1>;
+			nordic,drive-mode = <NRF_DRIVE_S0S1>;
 		};
 	};
 	/omit-if-no-ref/ sdp_mspi_sleep: sdp_mspi_sleep {
@@ -96,10 +95,37 @@
 	};
 };
 
+/delete-node/ &mx25r64;
+
 &sdp_mspi {
 	clock-frequency = <DT_FREQ_M(48)>;
 	pinctrl-0 = <&sdp_mspi_default>;
 	pinctrl-1 = <&sdp_mspi_sleep>;
 	pinctrl-names = "default", "sleep";
 	status = "okay";
+	mx25r64: mx25r6435f@0 {
+		compatible = "jedec,mspi-nor", "zephyr,mspi-emul-device";
+		status = "okay";
+		reg = <0>;
+		jedec-id = [c2 28 17];
+		sfdp-bfp = [
+			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
+			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
+			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 48 44
+			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
+		];
+		size = <67108864>;
+		has-dpd;
+		t-enter-dpd = <10000>;
+		t-exit-dpd = <35000>;
+		reset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+
+		mspi-max-frequency = <DT_FREQ_M(1)>;
+		mspi-io-mode = "MSPI_IO_MODE_SINGLE";
+		mspi-data-rate = "MSPI_DATA_RATE_SINGLE";
+		mspi-hardware-ce-num = <0>;
+		mspi-cpp-mode = "MSPI_CPP_MODE_0";
+		mspi-endian = "MSPI_BIG_ENDIAN";
+		mspi-ce-polarity = "MSPI_CE_ACTIVE_LOW";
+	};
 };