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board: soc: dts: Add nRF54LM20A and nRF54LV10A Socs and Boards #20867
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3ef8bff
board: soc: dts: Add nRF54LM20A SOC and Board
kl-cruz 97ce4f5
board: soc: dts: Add nRF54LV10A SOC and Board
kl-cruz d096305
codeowners: Add codeowners to nRF54L boards
kl-cruz 7b172e0
soc: Extend soc.yml with nRF54L runners
kl-cruz bcadacd
test: Extend test-spec with new entries
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| Original file line number | Diff line number | Diff line change |
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| # Copyright (c) 2024 Nordic Semiconductor ASA | ||
| # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
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| if BOARD_NRF54LM20APDK_NRF54LM20A_CPUAPP | ||
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| config ROM_START_OFFSET | ||
| default 0x800 if BOOTLOADER_MCUBOOT | ||
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| config SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE | ||
| default y | ||
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| endif # BOARD_NRF54LM20APDK_NRF54LM20A_CPUAPP |
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| # Copyright (c) 2024 Nordic Semiconductor ASA | ||
| # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
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| config BOARD_NRF54LM20APDK | ||
| select SOC_NRF54LM20A_ENGA_CPUAPP if BOARD_NRF54LM20APDK_NRF54LM20A_CPUAPP |
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| # Copyright (c) 2024 Nordic Semiconductor ASA | ||
| # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
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| board_runner_args(jlink "--device=cortex-m33" "--speed=4000") | ||
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| include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) | ||
| include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) |
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| board: | ||
| name: nrf54lm20apdk | ||
| full_name: nRF54LM20A PDK | ||
| vendor: nordic | ||
| socs: | ||
| - name: nrf54lm20a |
127 changes: 127 additions & 0 deletions
127
boards/nordic/nrf54lm20apdk/nrf54lm20a_cpuapp_common.dtsi
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| /* | ||
| * Copyright (c) 2024 Nordic Semiconductor ASA | ||
| * | ||
| * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
| */ | ||
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| /* This file is common to the secure and non-secure domain */ | ||
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| #include <nordic/nrf54lm20a_enga_cpuapp.dtsi> | ||
| #include "nrf54lm20apdk_nrf54lm20a-common.dtsi" | ||
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| / { | ||
| chosen { | ||
| zephyr,console = &uart20; | ||
| zephyr,shell-uart = &uart20; | ||
| zephyr,uart-mcumgr = &uart20; | ||
| zephyr,bt-mon-uart = &uart20; | ||
| zephyr,bt-c2h-uart = &uart20; | ||
| zephyr,flash-controller = &rram_controller; | ||
| zephyr,flash = &cpuapp_rram; | ||
| zephyr,bt-hci = &bt_hci_controller; | ||
| zephyr,ieee802154 = &ieee802154; | ||
| }; | ||
| }; | ||
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| &cpuapp_sram { | ||
| status = "okay"; | ||
| }; | ||
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| &hfpll { | ||
| /* For now use 64 MHz clock for CPU and fast peripherals. */ | ||
| clock-frequency = <DT_FREQ_M(64)>; | ||
| }; | ||
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| &lfxo { | ||
| load-capacitors = "internal"; | ||
| load-capacitance-femtofarad = <15500>; | ||
| }; | ||
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| &hfxo { | ||
| load-capacitors = "internal"; | ||
| load-capacitance-femtofarad = <15000>; | ||
| }; | ||
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| &grtc { | ||
| owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>; | ||
| /* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */ | ||
| child-owned-channels = <3 4 7 8 9 10 11>; | ||
| status = "okay"; | ||
| }; | ||
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| &cpuapp_rram { | ||
| partitions { | ||
| compatible = "fixed-partitions"; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
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| boot_partition: partition@0 { | ||
| label = "mcuboot"; | ||
| reg = <0x0 DT_SIZE_K(64)>; | ||
| }; | ||
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| slot0_partition: partition@10000 { | ||
| label = "image-0"; | ||
| reg = <0x10000 DT_SIZE_K(449)>; | ||
| }; | ||
|
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| slot0_ns_partition: partition@80400 { | ||
| label = "image-0-nonsecure"; | ||
| reg = <0x80400 DT_SIZE_K(449)>; | ||
| }; | ||
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| slot1_partition: partition@f0800 { | ||
| label = "image-1"; | ||
| reg = <0xf0800 DT_SIZE_K(449)>; | ||
| }; | ||
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| slot1_ns_partition: partition@160c00 { | ||
| label = "image-1-nonsecure"; | ||
| reg = <0x160c00 DT_SIZE_K(449)>; | ||
| }; | ||
| }; | ||
| }; | ||
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| &uart20 { | ||
| status = "okay"; | ||
| }; | ||
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| &gpio0 { | ||
| status = "okay"; | ||
| }; | ||
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| &gpio1 { | ||
| status = "okay"; | ||
| }; | ||
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| &gpio2 { | ||
| status = "okay"; | ||
| }; | ||
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| &gpiote20 { | ||
| status = "okay"; | ||
| }; | ||
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| &gpiote30 { | ||
| status = "okay"; | ||
| }; | ||
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| &radio { | ||
| status = "okay"; | ||
| }; | ||
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| &temp { | ||
| status = "okay"; | ||
| }; | ||
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| &clock { | ||
| status = "okay"; | ||
| }; | ||
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| &bt_hci_controller { | ||
| status = "okay"; | ||
| }; | ||
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| &ieee802154 { | ||
| status = "okay"; | ||
| }; | ||
102 changes: 102 additions & 0 deletions
102
boards/nordic/nrf54lm20apdk/nrf54lm20apdk_nrf54lm20a-common.dtsi
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| /* | ||
| * Copyright (c) 2024 Nordic Semiconductor ASA | ||
| * | ||
| * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
| */ | ||
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| #include "nrf54lm20apdk_nrf54lm20a-pinctrl.dtsi" | ||
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| / { | ||
| leds { | ||
| compatible = "gpio-leds"; | ||
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| led0: led_0 { | ||
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| gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; | ||
| label = "Green LED 0"; | ||
| }; | ||
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| led1: led_1 { | ||
| gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; | ||
| label = "Green LED 1"; | ||
| }; | ||
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| led2: led_2 { | ||
| gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; | ||
| label = "Green LED 2"; | ||
| }; | ||
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| led3: led_3 { | ||
| gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; | ||
| label = "Green LED 3"; | ||
| }; | ||
| }; | ||
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| pwmleds { | ||
| compatible = "pwm-leds"; | ||
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| /* | ||
| * PWM signal can be exposed on GPIO pin only within same domain. | ||
| * There is only one domain which contains both PWM and GPIO: | ||
| * PWM20/21/22 and GPIO Port P1/P3. | ||
| * Only LEDs connected to P1/P3 can work with PWM, for example LED1. | ||
| */ | ||
| pwm_led1: pwm_led_1 { | ||
| pwms = <&pwm20 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; | ||
| }; | ||
| }; | ||
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| buttons { | ||
| compatible = "gpio-keys"; | ||
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| button0: button_0 { | ||
| gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; | ||
| label = "Push button 0"; | ||
| zephyr,code = <INPUT_KEY_0>; | ||
| }; | ||
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| button1: button_1 { | ||
| gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; | ||
| label = "Push button 1"; | ||
| zephyr,code = <INPUT_KEY_1>; | ||
| }; | ||
|
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| button2: button_2 { | ||
| gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; | ||
| label = "Push button 2"; | ||
| zephyr,code = <INPUT_KEY_2>; | ||
| }; | ||
|
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| button3: button_3 { | ||
| gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; | ||
| label = "Push button 3"; | ||
| zephyr,code = <INPUT_KEY_3>; | ||
| }; | ||
| }; | ||
|
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| aliases { | ||
| led0 = &led0; | ||
| led1 = &led1; | ||
| led2 = &led2; | ||
| led3 = &led3; | ||
| pwm-led0 = &pwm_led1; | ||
| sw0 = &button0; | ||
| sw1 = &button1; | ||
| sw2 = &button2; | ||
| sw3 = &button3; | ||
| watchdog0 = &wdt31; | ||
| }; | ||
| }; | ||
|
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| &uart20 { | ||
| current-speed = <115200>; | ||
| pinctrl-0 = <&uart20_default>; | ||
| pinctrl-1 = <&uart20_sleep>; | ||
| pinctrl-names = "default", "sleep"; | ||
| }; | ||
|
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| &pwm20 { | ||
| status = "okay"; | ||
| pinctrl-0 = <&pwm20_default>; | ||
| pinctrl-1 = <&pwm20_sleep>; | ||
| pinctrl-names = "default", "sleep"; | ||
| }; | ||
38 changes: 38 additions & 0 deletions
38
boards/nordic/nrf54lm20apdk/nrf54lm20apdk_nrf54lm20a-pinctrl.dtsi
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,38 @@ | ||
| /* | ||
| * Copyright (c) 2024 Nordic Semiconductor | ||
| * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
| */ | ||
|
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| &pinctrl { | ||
| /omit-if-no-ref/ uart20_default: uart20_default { | ||
| group1 { | ||
| psels = <NRF_PSEL(UART_TX, 1, 4)>; | ||
| }; | ||
|
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| group2 { | ||
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|
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| psels = <NRF_PSEL(UART_RX, 1, 5)>; | ||
| bias-pull-up; | ||
| }; | ||
| }; | ||
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| /omit-if-no-ref/ uart20_sleep: uart20_sleep { | ||
| group1 { | ||
| psels = <NRF_PSEL(UART_TX, 1, 4)>, | ||
| <NRF_PSEL(UART_RX, 1, 5)>; | ||
| low-power-enable; | ||
| }; | ||
| }; | ||
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| /omit-if-no-ref/ pwm20_default: pwm20_default { | ||
| group1 { | ||
| psels = <NRF_PSEL(PWM_OUT0, 1, 7)>; | ||
| }; | ||
| }; | ||
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| /omit-if-no-ref/ pwm20_sleep: pwm20_sleep { | ||
| group1 { | ||
| psels = <NRF_PSEL(PWM_OUT0, 1, 7)>; | ||
| low-power-enable; | ||
| }; | ||
| }; | ||
| }; | ||
19 changes: 19 additions & 0 deletions
19
boards/nordic/nrf54lm20apdk/nrf54lm20apdk_nrf54lm20a_cpuapp.dts
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,19 @@ | ||
| /* | ||
| * Copyright (c) 2024 Nordic Semiconductor ASA | ||
| * | ||
| * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
| */ | ||
|
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| /dts-v1/; | ||
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| #include "nrf54lm20a_cpuapp_common.dtsi" | ||
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| / { | ||
| compatible = "nordic,nrf54lm20apdk_nrf54lm20a-cpuapp"; | ||
| model = "Nordic nRF54LM20A PDK nRF54LM20A Application MCU"; | ||
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| chosen { | ||
| zephyr,code-partition = &slot0_partition; | ||
| zephyr,sram = &cpuapp_sram; | ||
| }; | ||
| }; |
21 changes: 21 additions & 0 deletions
21
boards/nordic/nrf54lm20apdk/nrf54lm20apdk_nrf54lm20a_cpuapp.yaml
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| Original file line number | Diff line number | Diff line change |
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| # Copyright (c) 2024 Nordic Semiconductor ASA | ||
| # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
|
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| identifier: nrf54lm20apdk/nrf54lm20a/cpuapp | ||
| name: nRF54LM20A-PDK-nRF54LM20A-Application | ||
| type: mcu | ||
| arch: arm | ||
| toolchain: | ||
| - gnuarmemb | ||
| - zephyr | ||
| sysbuild: true | ||
| ram: 512 | ||
| flash: 449 | ||
| supported: | ||
| - adc | ||
| - counter | ||
| - dmic | ||
| - gpio | ||
| - i2c | ||
| - pwm | ||
| - watchdog |
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