Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Original file line number Diff line number Diff line change
Expand Up @@ -4,11 +4,15 @@
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
*/

/* Test requires loopback between P1.18 and P1.24.
* For best performance, PDM_CLK shall be on 'Clock pin'.
*/

&pinctrl {
pdm20_default_alt: pdm20_default_alt {
group1 {
psels = <NRF_PSEL(PDM_CLK, 1, 10)>,
<NRF_PSEL(PDM_DIN, 1, 11)>;
psels = <NRF_PSEL(PDM_CLK, 1, 18)>,
<NRF_PSEL(PDM_DIN, 1, 24)>;
};
};
};
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
*/

/* Test requires loopback between P1.10 and P1.11 */

&pinctrl {
pdm20_default_alt: pdm20_default_alt {
group1 {
psels = <NRF_PSEL(PDM_CLK, 1, 10)>,
<NRF_PSEL(PDM_DIN, 1, 11)>;
};
};
};

dmic_dev: &pdm20 {
status = "okay";
pinctrl-0 = <&pdm20_default_alt>;
pinctrl-names = "default";
clock-source = "PCLK32M";
};
2 changes: 2 additions & 0 deletions samples/zephyr/drivers/audio/dmic/sample.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -15,5 +15,7 @@ tests:
- "Exiting"
platform_allow:
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
integration_platforms:
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
Original file line number Diff line number Diff line change
Expand Up @@ -4,20 +4,24 @@
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
*/

/* Test requires loopback between P1.18 and P1.24.
* For best performance, PDM_CLK shall be on 'Clock pin'.
*/

/ {
gpio_test {
compatible = "gpio-leds";
pulse_counter: pulse_counter {
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
};
};
};

&pinctrl {
pdm20_default_alt: pdm20_default_alt {
group1 {
psels = <NRF_PSEL(PDM_CLK, 1, 10)>,
<NRF_PSEL(PDM_DIN, 1, 12)>;
psels = <NRF_PSEL(PDM_CLK, 1, 18)>,
<NRF_PSEL(PDM_DIN, 1, 19)>;
};
};
};
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,42 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
*/

/* Test requires loopback between P1.11 and P1.10.
* For best performance, PDM_CLK shall be on 'Clock pin'.
*/

/ {
gpio_test {
compatible = "gpio-leds";
pulse_counter: pulse_counter {
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
};
};

&pinctrl {
pdm20_default_alt: pdm20_default_alt {
group1 {
psels = <NRF_PSEL(PDM_CLK, 1, 10)>,
<NRF_PSEL(PDM_DIN, 1, 12)>;
};
};
};

pdm_dev: &pdm20 {
status = "okay";
pinctrl-0 = <&pdm20_default_alt>;
pinctrl-names = "default";
clock-source = "PCLK32M";
};

&gpio1 {
status = "okay";
};

&timer00 {
status = "okay";
};
7 changes: 7 additions & 0 deletions tests/drivers/audio/pdm_loopback/testcase.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -13,11 +13,13 @@ tests:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
extra_args: CONFIG_NRFX_TIMER00=y
drivers.audio.pdm_loopback.nrf54l20.1000khz:
platform_allow:
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
extra_args:
- CONFIG_NRFX_TIMER00=y
- CONFIG_TEST_PDM_SAMPLING_RATE=20000
Expand All @@ -26,6 +28,7 @@ tests:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
extra_args:
- CONFIG_NRFX_TIMER00=y
- CONFIG_TEST_PDM_SAMPLING_RATE=16000
Expand All @@ -35,6 +38,7 @@ tests:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
extra_args:
- CONFIG_NRFX_TIMER00=y
- CONFIG_TEST_PDM_SAMPLING_RATE=32000
Expand All @@ -43,6 +47,7 @@ tests:
platform_allow:
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
extra_args:
- CONFIG_NRFX_TIMER00=y
- CONFIG_TEST_PDM_SAMPLING_RATE=20000
Expand All @@ -51,6 +56,7 @@ tests:
platform_allow:
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
extra_args:
- CONFIG_NRFX_TIMER00=y
- CONFIG_TEST_PDM_SAMPLING_RATE=16000
Expand All @@ -60,6 +66,7 @@ tests:
platform_allow:
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
extra_args:
- CONFIG_NRFX_TIMER00=y
- CONFIG_TEST_PDM_SAMPLING_RATE=32000
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,10 @@
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
*/

/* Test requires loopback between P1.18 and P1.24.
* For best performance, PDM_CLK shall be on 'Clock pin'.
*/

/ {
aliases {
dmic-dev = &pdm20;
Expand All @@ -13,8 +17,8 @@
&pinctrl {
pdm20_default_alt: pdm20_default_alt {
group1 {
psels = <NRF_PSEL(PDM_CLK, 1, 10)>,
<NRF_PSEL(PDM_DIN, 1, 11)>;
psels = <NRF_PSEL(PDM_CLK, 1, 18)>,
<NRF_PSEL(PDM_DIN, 1, 24)>;
};
};
};
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,29 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
*/

/* Test requires loopback between P1.10 and P1.11 */

/ {
aliases {
dmic-dev = &pdm20;
};
};

&pinctrl {
pdm20_default_alt: pdm20_default_alt {
group1 {
psels = <NRF_PSEL(PDM_CLK, 1, 10)>,
<NRF_PSEL(PDM_DIN, 1, 11)>;
};
};
};

dmic_dev: &pdm20 {
status = "okay";
pinctrl-0 = <&pdm20_default_alt>;
pinctrl-names = "default";
clock-source = "PCLK32M";
};
2 changes: 2 additions & 0 deletions tests/zephyr/drivers/audio/dmic_api/testcase.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -6,5 +6,7 @@ tests:
harness: ztest
platform_allow:
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
integration_platforms:
- nrf54lm20apdk/nrf54lm20a/cpuapp
- [email protected]/nrf54lm20a/cpuapp
2 changes: 1 addition & 1 deletion west.yml
Original file line number Diff line number Diff line change
Expand Up @@ -65,7 +65,7 @@ manifest:
# https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/zephyr/guides/modules.html
- name: zephyr
repo-path: sdk-zephyr
revision: 926f1420dc656640cc430952c46fcd77ce0a470f
revision: 91f09557641e886420f95a5fb184459b4d2af630
import:
# In addition to the zephyr repository itself, NCS also
# imports the contents of zephyr/west.yml at the above
Expand Down
Loading