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drivers: mspi_sqspi: A few corrections #22539

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Merged
merged 3 commits into from
May 29, 2025
Merged

drivers: mspi_sqspi: A few corrections #22539

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7de2f71
drivers: mspi_sqspi: Use TX direction when there is no data to transfer
anangl May 27, 2025
8d6c436
drivers: mspi_sqspi: Add handling of FLPR RAM retention on nRF54L15
anangl May 27, 2025
ff71b2c
drivers: mspi_sqspi: Don't configure FLPR as secure in non-secure image
anangl May 27, 2025
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15 changes: 14 additions & 1 deletion drivers/mspi/mspi_sqspi.c
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Original file line number Diff line number Diff line change
Expand Up @@ -17,8 +17,9 @@
#include <softperipheral_regif.h>
#include <nrfx_qspi2.h>
#if defined(CONFIG_SOC_SERIES_NRF54LX)
#include <hal/nrf_spu.h>
#include <hal/nrf_memconf.h>
#include <hal/nrf_oscillators.h>
#include <hal/nrf_spu.h>
#endif
#if defined(CONFIG_SOC_NRF54H20_GPD)
#include <nrf/gpd.h>
Expand Down Expand Up @@ -288,6 +289,8 @@ static int process_packet(const struct device *dev,
{
const struct mspi_sqspi_config *dev_config = dev->config;
nrfx_qspi2_xfer_t qspi2_xfer = {
/* Use TX direction when there is no data to transfer. */
.dir = NRFX_QSPI2_XFER_DIR_TX,
.cmd = packet->cmd,
.address = packet->address,
.data_length = packet->num_bytes,
Expand Down Expand Up @@ -437,6 +440,10 @@ static int dev_pm_action_cb(const struct device *dev,
}
#endif
nrfx_qspi2_activate(&dev_config->qspi2);
#if defined(CONFIG_SOC_SERIES_NRF54LX)
nrf_memconf_ramblock_ret_enable_set(NRF_MEMCONF,
1, MEMCONF_POWER_RET_MEM0_Pos, false);
#endif

dev_data->suspended = false;

Expand Down Expand Up @@ -464,6 +471,10 @@ static int dev_pm_action_cb(const struct device *dev,
return -EBUSY;
}

#if defined(CONFIG_SOC_SERIES_NRF54LX)
nrf_memconf_ramblock_ret_enable_set(NRF_MEMCONF,
1, MEMCONF_POWER_RET_MEM0_Pos, true);
#endif
nrfx_qspi2_deactivate(&dev_config->qspi2);

k_sem_give(&dev_data->ctx_lock);
Expand Down Expand Up @@ -506,10 +517,12 @@ static int dev_init(const struct device *dev)
#if defined(CONFIG_SOC_SERIES_NRF54LX)
nrf_oscillators_pll_freq_set(NRF_OSCILLATORS,
NRF_OSCILLATORS_PLL_FREQ_128M);
#if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
nrf_spu_periph_perm_secattr_set(NRF_SPU00,
nrf_address_slave_get(DT_REG_ADDR(DT_NODELABEL(cpuflpr_vpr))),
true);
#endif
#endif /* defined(CONFIG_SOC_SERIES_NRF54LX) */

IRQ_CONNECT(DT_IRQN(VPR_NODE), DT_IRQ(VPR_NODE, priority),
nrfx_isr, nrfx_qspi2_irq_handler, 0);
Expand Down