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2 changes: 1 addition & 1 deletion applications/nrf5340_audio/Kconfig.defaults
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ config REGULATOR
config CONTIN_ARRAY
default y

config NRFX_I2S0
config NRFX_I2S
default y

config PCM_MIX
Expand Down
4 changes: 2 additions & 2 deletions applications/nrf5340_audio/src/modules/audio_i2s.c
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ PINCTRL_DT_DEFINE(I2S_NL);
#error "Current AUDIO_SAMPLE_RATE_HZ setting not supported"
#endif

static nrfx_i2s_t i2s_inst = NRFX_I2S_INSTANCE(0);
static nrfx_i2s_t i2s_inst = NRFX_I2S_INSTANCE(NRF_I2S0);

static nrfx_i2s_config_t cfg = {
/* Pins are configured by pinctrl. */
Expand Down Expand Up @@ -150,7 +150,7 @@ void audio_i2s_init(void)
ret = pinctrl_apply_state(PINCTRL_DT_DEV_CONFIG_GET(I2S_NL), PINCTRL_STATE_DEFAULT);
__ASSERT_NO_MSG(ret == 0);

IRQ_CONNECT(DT_IRQN(I2S_NL), DT_IRQ(I2S_NL, priority), nrfx_isr, nrfx_i2s_0_irq_handler, 0);
IRQ_CONNECT(DT_IRQN(I2S_NL), DT_IRQ(I2S_NL, priority), nrfx_i2s_irq_handler, &i2s_inst, 0);
irq_enable(DT_IRQN(I2S_NL));

ret = nrfx_i2s_init(&i2s_inst, &cfg, i2s_comp_handler);
Expand Down
1 change: 1 addition & 0 deletions tests/drivers/grtc/grtc_clk_output/prj.conf
Original file line number Diff line number Diff line change
@@ -1,2 +1,3 @@
CONFIG_ZTEST=y
CONFIG_SPEED_OPTIMIZATIONS=y
CONFIG_CLOCK_CONTROL=y
69 changes: 69 additions & 0 deletions tests/drivers/grtc/grtc_clk_output/src/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
#include <zephyr/kernel.h>
#include <zephyr/ztest.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/clock_control/nrf_clock_control.h>


static volatile uint32_t count_clk;
Expand All @@ -15,6 +16,61 @@ static struct gpio_callback clk_cb_data;
static const struct gpio_dt_spec gpio_clk_spec =
GPIO_DT_SPEC_GET_BY_IDX(DT_PATH(zephyr_user), gpios, 0);

#define GRTC_NODE DT_NODELABEL(grtc)
#if DT_NODE_HAS_PROP(GRTC_NODE, clkout_fast_frequency_hz)
static struct onoff_client clk_cli;
static volatile bool clock_requested;

/* Callback for clock request. */
static void clock_started_callback(struct onoff_manager *mgr,
struct onoff_client *cli,
uint32_t state,
int res)
{
(void)mgr;
(void)cli;
(void)state;
(void)res;

clock_requested = true;
}
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(fll16m))
#define NODE_HFCLK DT_NODELABEL(fll16m)
#define HFCLK_FREQUENCY DT_PROP_OR(NODE_HFCLK, frequency, 0)

static const struct device *fll16m = DEVICE_DT_GET(NODE_HFCLK);
static const struct nrf_clock_spec hfclk_spec = {
.frequency = HFCLK_FREQUENCY,
};
#elif defined(CONFIG_SOC_SERIES_NRF54LX)
static struct onoff_manager *clk_mgr;
#endif

static int hf_clock_request(void)
{
sys_notify_init_callback(&clk_cli.notify, clock_started_callback);
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(fll16m))
return nrf_clock_control_request(fll16m, &hfclk_spec, &clk_cli);
#elif defined(CONFIG_SOC_SERIES_NRF54LX)
clock_control_subsys_t subsys = CLOCK_CONTROL_NRF_SUBSYS_HF;

clk_mgr = z_nrf_clock_control_get_onoff(subsys);
return onoff_request(clk_mgr, &clk_cli);
#endif
return -ENOTSUP;
}

static int hf_clock_release(void)
{
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(fll16m))
return nrf_clock_control_release(fll16m, &hfclk_spec);
#elif defined(CONFIG_SOC_SERIES_NRF54LX)
return onoff_release(clk_mgr);
#endif
return -ENOTSUP;
}
#endif /* DT_NODE_HAS_PROP(GRTC_NODE, clkout_fast_frequency_hz) */

/* ISR that counts rising edges on the CLK signal. */
static void gpio_clk_isr(const struct device *dev, struct gpio_callback *cb, uint32_t pins)
{
Expand All @@ -37,10 +93,23 @@ ZTEST(drivers_grtc_clk_out, test_grtc_clk_output)
TC_PRINT("Frequency = %u\n", CONFIG_TEST_GRTC_FREQUENCY);
TC_PRINT("Tolerance = %u clock edges\n", CONFIG_TEST_GRTC_TOLERANCE);

#if DT_NODE_HAS_PROP(GRTC_NODE, clkout_fast_frequency_hz)
int ret = hf_clock_request();

zassert_true(ret >= 0, "Failed to request clock.");
k_msleep(20);
zassert_true(clock_requested == true, "Failed to request clock.");
#endif

count_clk = 0;
k_msleep(1000);
temp = count_clk;

#if DT_NODE_HAS_PROP(GRTC_NODE, clkout_fast_frequency_hz)
ret = hf_clock_release();
zassert_true(ret >= 0, "Failed to release clock.");
#endif

/* Verify number of edges on CLK (with some tolerance) */
zassert_true(temp >= min,
"CLK has %u rising edges, while at least %u is expected.",
Expand Down
1 change: 0 additions & 1 deletion tests/drivers/nrfx_integration_test/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,6 @@ config NRFX_ALL_DRIVERS
select NRFX_GPIOTE130 if HAS_HW_NRF_GPIOTE130
select NRFX_GPIOTE131 if HAS_HW_NRF_GPIOTE131
select NRFX_GPPI
select NRFX_I2S if HAS_HW_NRF_I2S
select NRFX_IPC if HAS_HW_NRF_IPC
select NRFX_LPCOMP if HAS_HW_NRF_LPCOMP
select NRFX_NFCT if HAS_HW_NRF_NFCT
Expand Down
4 changes: 2 additions & 2 deletions west.yml
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,7 @@ manifest:
# https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/zephyr/guides/modules.html
- name: zephyr
repo-path: sdk-zephyr
revision: 079d80388a6240f572442ce7021f1aab31a56139
revision: pull/3401/head
import:
# In addition to the zephyr repository itself, NCS also
# imports the contents of zephyr/west.yml at the above
Expand Down Expand Up @@ -280,7 +280,7 @@ manifest:
path: nrfx
groups:
- nrfx
revision: 7ed74ac12ab94f561af820da8fb7089a0323e6de
revision: pull/989/head

# West-related configuration for the nrf repository.
self:
Expand Down
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