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[nrf fromtree] boards: nrf54h20dk: Limit app core FLASH_LOAD_SIZE
CONFIG_USE_DT_CODE_PARTITION had to be disabled to add MCUboot support. As a result, CONFIG_FLASH_LOAD_SIZE was left at zero, which means that the linker would claim all available MRAM for the app core. For now, we can't allow that, because the default nRF54H20 DK memory map divides MRAM between multiple cores in order to support various samples. Signed-off-by: Grzegorz Swiderski <[email protected]> (cherry picked from commit b7b8b27)
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boards/nordic/nrf54h20dk/Kconfig.defconfig

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@@ -22,6 +22,13 @@ if !USE_DT_CODE_PARTITION
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config FLASH_LOAD_OFFSET
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default $(dt_nodelabel_reg_addr_hex,cpuapp_boot_partition)
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# This is meant to span 'cpuapp_boot_partition' and 'cpuapp_slot0_partition'
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# in the default memory map.
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config FLASH_LOAD_SIZE
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default $(add_hex, $(dt_nodelabel_reg_addr_hex,cpuapp_slot0_partition), \
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$(dt_nodelabel_reg_size_hex,cpuapp_slot0_partition), \
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-$(dt_nodelabel_reg_addr_hex,cpuapp_boot_partition))
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endif # !USE_DT_CODE_PARTITION
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endif # BOARD_NRF54H20DK_NRF54H20_CPUAPP

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