[nrf fromtree] tests: drivers: Update nrf2 clock control tests for nrf2_auxpll driver

Test added for new nrf2_auxpll driver. Frequency checks are
against known usecases of the auxpll (USB, CAN and AUDIO).
Also update test to be more modular, only running certain tests
if in the devicetree.

Signed-off-by: David Jewsbury <[email protected]>
(cherry picked from commit bd5aefb)

Author: Hi-Im-David

tests/drivers/clock_control/nrf_clock_control/src/main.c

@@ -9,13 +9,15 @@
 #include <zephyr/drivers/clock_control/nrf_clock_control.h>
 #include <zephyr/kernel.h>
 #include <zephyr/ztest.h>
+#include <zephyr/dt-bindings/clock/nrf-auxpll.h>
 
 struct test_clk_context {
 	const struct device *clk_dev;
 	const struct nrf_clock_spec *clk_specs;
 	size_t clk_specs_size;
 };
 
+#if defined(CONFIG_CLOCK_CONTROL_NRF_HSFLL_LOCAL)
 const struct nrf_clock_spec test_clk_specs_hsfll[] = {
 	{
 		.frequency = MHZ(128),
@@ -33,6 +35,7 @@ const struct nrf_clock_spec test_clk_specs_hsfll[] = {
 		.precision = NRF_CLOCK_CONTROL_PRECISION_DEFAULT,
 	},
 };
+#endif
 
 #if CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP
 const struct nrf_clock_spec test_clk_specs_fll16m[] = {
@@ -99,6 +102,7 @@ static const struct test_clk_context cpurad_hsfll_test_clk_contexts[] = {
 };
 #endif
 
+#if defined(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL)
 const struct nrf_clock_spec test_clk_specs_global_hsfll[] = {
 	{
 		.frequency = MHZ(320),
@@ -121,7 +125,9 @@ static const struct test_clk_context global_hsfll_test_clk_contexts[] = {
 		.clk_specs_size = ARRAY_SIZE(test_clk_specs_global_hsfll),
 	},
 };
+#endif
 
+#if defined(CONFIG_CLOCK_CONTROL_NRF_LFCLK)
 const struct nrf_clock_spec test_clk_specs_lfclk[] = {
 	{
 		.frequency = 32768,
@@ -147,6 +153,44 @@ static const struct test_clk_context lfclk_test_clk_contexts[] = {
 		.clk_specs_size = ARRAY_SIZE(test_clk_specs_lfclk),
 	},
 };
+#endif
+
+#if defined(CONFIG_CLOCK_CONTROL_NRF_AUXPLL)
+
+#define AUXPLL_COMPAT nordic_nrf_auxpll
+#define AUXPLL_NODE DT_INST(0, AUXPLL_COMPAT)
+#define AUXPLL_FREQ DT_PROP(AUXPLL_NODE, nordic_frequency)
+
+/* Gets selected AUXPLL DIV and selects the expected frequency */
+#if AUXPLL_FREQ == NRF_AUXPLL_FREQUENCY_DIV_MIN
+#define AUXPLL_FREQ_OUT 80000000
+#elif AUXPLL_FREQ == NRF_AUXPLL_FREQ_DIV_AUDIO_44K1
+#define AUXPLL_FREQ_OUT 11289591
+#elif AUXPLL_FREQ == NRF_AUXPLL_FREQ_DIV_USB_24M
+#define AUXPLL_FREQ_OUT 24000000
+#elif AUXPLL_FREQ == NRF_AUXPLL_FREQ_DIV_AUDIO_48K
+#define AUXPLL_FREQ_OUT 12287963
+#else
+/*No use case for NRF_AUXPLL_FREQ_DIV_MAX or others yet*/
+#error "Unsupported AUXPLL frequency selection"
+#endif
+
+const struct nrf_clock_spec test_clk_specs_auxpll[] = {
+	{
+		.frequency = AUXPLL_FREQ_OUT,
+		.accuracy = 0,
+		.precision = NRF_CLOCK_CONTROL_PRECISION_DEFAULT,
+	},
+};
+
+static const struct test_clk_context auxpll_test_clk_contexts[] = {
+	{
+		.clk_dev = DEVICE_DT_GET(AUXPLL_NODE),
+		.clk_specs = test_clk_specs_auxpll,
+		.clk_specs_size = ARRAY_SIZE(test_clk_specs_auxpll),
+	},
+};
+#endif
 
 static void test_request_release_clock_spec(const struct device *clk_dev,
 					    const struct nrf_clock_spec *clk_spec)
@@ -266,18 +310,23 @@ ZTEST(nrf2_clock_control, test_cpurad_hsfll_control)
 }
 #endif
 
-ZTEST(nrf2_clock_control, test_lfclk_control)
-{
-	TC_PRINT("LFCLK test\n");
-	test_clock_control_request(lfclk_test_clk_contexts, ARRAY_SIZE(lfclk_test_clk_contexts));
-}
 
+
+#if defined(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL)
 ZTEST(nrf2_clock_control, test_global_hsfll_control)
 {
 	TC_PRINT("Global HSFLL test\n");
 	test_clock_control_request(global_hsfll_test_clk_contexts,
 				   ARRAY_SIZE(global_hsfll_test_clk_contexts));
 }
+#endif
+
+#if defined(CONFIG_CLOCK_CONTROL_NRF_LFCLK)
+ZTEST(nrf2_clock_control, test_lfclk_control)
+{
+	TC_PRINT("LFCLK test\n");
+	test_clock_control_request(lfclk_test_clk_contexts, ARRAY_SIZE(lfclk_test_clk_contexts));
+}
 
 ZTEST(nrf2_clock_control, test_safe_request_cancellation)
 {
@@ -303,6 +352,16 @@ ZTEST(nrf2_clock_control, test_safe_request_cancellation)
 	TC_PRINT("Clock control safe cancellation return value: %d\n", ret);
 	zassert_between_inclusive(ret, ONOFF_STATE_ON, ONOFF_STATE_TO_ON);
 }
+#endif
+
+#if defined(CONFIG_CLOCK_CONTROL_NRF_AUXPLL)
+ZTEST(nrf2_clock_control, test_auxpll_control)
+{
+	TC_PRINT("AUXPLL control test\n");
+	test_clock_control_request(auxpll_test_clk_contexts,
+				   ARRAY_SIZE(auxpll_test_clk_contexts));
+}
+#endif
 
 static void *setup(void)
 {