-
Notifications
You must be signed in to change notification settings - Fork 716
[nrf noup] soc: nrf54l: Disable CRACEN RAMs on system off #1983
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
base: main
Are you sure you want to change the base?
Conversation
9c7bac0 to
1374c3a
Compare
dd4a1e8 to
bc4c35a
Compare
soc/nordic/nrf54l/soc.c
Outdated
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Could those (1 << X) be defines to explain what they are?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Could MEMCONF_POWER_RET_MEM2_Msk, MEMCONF_POWER_RET_MEM3_Msk and MEMCONF_POWER_CONTROL_MEM2_Msk and MEMCONF_POWER_CONTROL_MEM3_Msk be utilized for this?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Please don't mix MDK defines with HAL functions, if you think those masks are needed we can add them to HAL.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Yeah, I will not mix these up indeed. But I will write some more description on the bits that I am setting now that I got a confirmation from the spec writers that it is ok to do so.
soc/nordic/nrf54l/soc.c
Outdated
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Could MEMCONF_POWER_RET_MEM2_Msk, MEMCONF_POWER_RET_MEM3_Msk and MEMCONF_POWER_CONTROL_MEM2_Msk and MEMCONF_POWER_CONTROL_MEM3_Msk be utilized for this?
c411b55 to
537ed7d
Compare
537ed7d to
8e05776
Compare
While Partition Manager is enabled, it manages the offset by itself. Signed-off-by: Andrzej Puzdrowski <[email protected]>
Demultiplexer was not ready to handle case when log message was incomplete which was followed by other log messages. Such scenario could occur if there was a fault that happen during logging of a message. In that case incomplete message was followed by valid messages (fault report) and this fault report was not handled because processing was blocked waiting for completion of a message which preceeded fault report. Since it is expected that some messages may be incomplete a garbage collection mechanism is added. When start of a message is received timestamp is logged and list of incomplete messages is checked for 'old' messages which persist in incomplete state for long. When message timeouts it is closed and marked as invalid. It unblocks processing of following messages. Upstream PR: zephyrproject-rtos/zephyr#78333 Signed-off-by: Krzysztof Chruściński <[email protected]>
Apply clang-format formatting. Upstream PR: zephyrproject-rtos/zephyr#78332 Signed-off-by: Krzysztof Chruściński <[email protected]>
write_data function which was writing to STMESP data registers was starting by writing words and tail was written using byte access. However, RISCV core does not support unaligned access and on Cortex-M33 even if supported it is faster to do aligned access. Reworked write_data to start first by writing data using byte or half word access until data pointer is word aligned, then word access is used and finally tail is written using byte or half word access. Upstream PR: zephyrproject-rtos/zephyr#78332 Signed-off-by: Krzysztof Chruściński <[email protected]>
nrf-squash! [nrf noup] ci: add .github/test-spec.yml Adding samples/boards/nrf[nordic] + sorting. Signed-off-by: Piotr Kosycarz <[email protected]>
For nrf54h20 a range of combinations exist to configure the test and debug domains data sources and sinks. Expose them in DTS to allow configuring them. Also drop the previous style which was too rigid to extend to cover all cases cleanly. The old style was only used in a single sample application so far. Signed-off-by: Karsten Koenig <[email protected]> (cherry picked from commit 43f9488)
Test did not support PPR core due to failing GRTC channel allocation. This change fixes the channel allocation and enables PPR core test. Signed-off-by: Bartosz Miller <[email protected]> (cherry picked from commit e26b975)
Update OpenThread up to `2aeb8b8` and align KConfig options Upstream PR: zephyrproject-rtos/zephyr#79180 Signed-off-by: Maciej Baczmanski <[email protected]>
… features Doc and .yaml descriptions shall mention retained_mem in supported features on affected boards. Signed-off-by: Nikodem Kastelik <[email protected]> (cherry picked from commit 478a40a)
Last 1k is used for saving VPR context and shall not be exposed. Limiting RAM to 511k. Signed-off-by: Krzysztof Chruściński <[email protected]> (cherry picked from commit 7b3acdb)
Extend system_off sample to use GRTC timer as a wake up source. Upstream PR: zephyrproject-rtos/zephyr#79095 Signed-off-by: Bartlomiej Buczek <[email protected]>
This patch changes GPIO initialization to be in PORT_OFF state by default. Also, if no transceiver is attached to the signals, the GPIOs are configured to be disconnected to preserve power. I tested this on a prototype board where we are going to have a debugger in a low-power context. Signed-off-by: Maximilian Deubel <[email protected]> (cherry picked from commit b0936ae)
Since CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC is tied to the slow RTC clock for the nRF53, use the default SYSCLK of 64MHz instead. Signed-off-by: Maximilian Deubel <[email protected]> (cherry picked from commit 621a600)
This patch updates the SWD clock calculation to the latest behavior of DAPLink. Signed-off-by: Maximilian Deubel <[email protected]> (cherry picked from commit fd686a2)
The variable config in sw_port_off() is not used, and it's causing CI build error about unused variable. So remove it. Signed-off-by: Daniel Leung <[email protected]> (cherry picked from commit 1ec5ce0)
…on TX notify Use a separate workqueue instead of system workqueue for connection TX notify processing. This makes Bluetooth stack more independent from the system workqueue. Signed-off-by: Marek Pieta <[email protected]> (cherry picked from commit 341f1f5)
…time" This reverts commit a77ea2d. Signed-off-by: Adam Kondraciuk <[email protected]>
…e PM" This reverts commit 4fe89b2. Signed-off-by: Adam Kondraciuk <[email protected]>
…e PM Enable the device runtime power management on the SPIM shim. Upstream PR: zephyrproject-rtos/zephyr#75715 Signed-off-by: Adam Kondraciuk <[email protected]>
Add configuration for testing SPI with device runtime PM enabled for nRF platforms. Upstream PR: zephyrproject-rtos/zephyr#75715 Signed-off-by: Adam Kondraciuk <[email protected]>
Some devices, e.g. SoC level devices like I2C peripheral, can never be powerd off as they are always energized. Such devices can only go from an active state or to a low power state (suspended). Allow them to simply return -ENOTSUP when called with TURN_ON (or TURN_OFF). Signed-off-by: Gerard Marull-Paretas <[email protected]> (cherry picked from commit 740eba1)
Use NRFX_FOREACH_PRESENT macro to iterate over all PWM instances and create device only for those enabled in the devicetree. This approach removes need of changing driver code when new instance id is added. Signed-off-by: Krzysztof Chruściński <[email protected]> (cherry picked from commit 0ab86c4)
Shim was not correctly disabling PWM when it was not used. Task STOP was triggered but PWM->ENABLE remained set which caused increased current. Added interrupt and enabled event handler in the nrfx driver to allow disabling PWM on STOPPED event. Signed-off-by: Krzysztof Chruściński <[email protected]> (cherry picked from commit c3a33cf)
Rework PM handling to use pm_device_driver_init(). Shim is not using put and get internally as there is no api that disables or stops pwm so it is hard to determine when to put the device. There are cases when PWM peripheral is stopped but PWM is still active because duty cycle is 100% or 0% and pin is driven by GPIO and not PWM. If user want to use runtime PM with PWM it is possible and getting the device will initialize internal data and putting will suspend by forcing PWM stop if used and setting pins to sleep state. However, from power consumption perspective it is enough to set 0% or 100% duty cycle on all channels. Signed-off-by: Krzysztof Chruściński <[email protected]> (cherry picked from commit e11d050)
Like in all other legacy boards, hw-flow-control should not be enabled for console UART. With hw-flow-control sample stuck during printing some initial information and sample appears to be not working correctly unless com port is opened. Signed-off-by: Krzysztof Chruściński <[email protected]> (cherry picked from commit 01f2740)
Configure the CRACEN internal RAMs to avoid being retained during system off. Exiting system off triggers a system level reset so there is no need for the CRACEN RAMs to be retained during that. Also don't retain the CRACEN RAMs in system on idle if CRACEN is not used at all. Noup since the upstream code is not TFM aware yet and the edited function does not exist upstream. Ref: NCSDK-27427 Signed-off-by: Georgios Vasilakis <[email protected]>
518ce61 to
8b49f24
Compare
|
@Vge0rge is this PR still valid? |
It is but I didn't have a chance to work on it for some time now :/ |
|
@Vge0rge Is this still relevant? |
Configure the CRACEN internal RAMs to avoid being retained during system off. Exiting system off triggers a system level reset so there is no need for the CRACEN RAMs to be retained during that.
Noup since the upstream code is not TFM aware yet and the edited function does not exist upstream.