[nrf fromtree] boards: nordic: ipc: added dcache alignement #2154
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The nRF54 and nRF92 chips has data cache, which means the ICMsg and ICBMsg must be configured to follow required cache alignment of the shared memory. The `dcache-alignement` needs to be defined for that. Signed-off-by: Dominik Kilian <[email protected]> (cherry picked from commit cbaafe2)
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IPC tests are passing. |
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The nRF54 and nRF92 chips has data cache, which means the ICMsg and ICBMsg must be configured to follow required cache alignment of the shared memory.
The
dcache-alignementneeds to be defined for that.Upstream commit: zephyrproject-rtos/zephyr@cbaafe2