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[nrf fromtree] arch:riscv: Support for Direct ISRs for RISCV targets #2882

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Merged
merged 1 commit into from
Sep 29, 2025
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[nrf fromtree] arch:riscv: Support for Direct ISRs for RISCV targets #2882

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17 changes: 17 additions & 0 deletions arch/riscv/core/irq_manage.c
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Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@
#include <zephyr/arch/riscv/csr.h>
#include <zephyr/irq_multilevel.h>
#include <zephyr/sw_isr_table.h>
#include <zephyr/pm/pm.h>

#ifdef CONFIG_RISCV_HAS_PLIC
#include <zephyr/drivers/interrupt_controller/riscv_plic.h>
Expand Down Expand Up @@ -75,3 +76,19 @@ int arch_irq_disconnect_dynamic(unsigned int irq, unsigned int priority,
}
#endif /* CONFIG_SHARED_INTERRUPTS */
#endif /* CONFIG_DYNAMIC_INTERRUPTS */

#ifdef CONFIG_PM
void arch_isr_direct_pm(void)
{
unsigned int key;

key = irq_lock();

if (_kernel.idle) {
_kernel.idle = 0;
pm_system_resume();
}

irq_unlock(key);
}
#endif
15 changes: 15 additions & 0 deletions drivers/timer/nrf_grtc_timer.c
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Original file line number Diff line number Diff line change
Expand Up @@ -459,12 +459,27 @@ uint32_t sys_clock_elapsed(void)
return (uint32_t)(counter_sub(counter(), last_count) / CYC_PER_TICK);
}

#if !defined(CONFIG_GEN_SW_ISR_TABLE)
ISR_DIRECT_DECLARE(nrfx_grtc_direct_irq_handler)
{
nrfx_grtc_irq_handler();
ISR_DIRECT_PM();
return 1;
}
#endif

static int sys_clock_driver_init(void)
{
nrfx_err_t err_code;

#if defined(CONFIG_GEN_SW_ISR_TABLE)
IRQ_CONNECT(DT_IRQN(GRTC_NODE), DT_IRQ(GRTC_NODE, priority), nrfx_isr,
nrfx_grtc_irq_handler, 0);
#else
IRQ_DIRECT_CONNECT(DT_IRQN(GRTC_NODE), DT_IRQ(GRTC_NODE, priority),
nrfx_grtc_direct_irq_handler, 0);
irq_enable(DT_IRQN(GRTC_NODE));
#endif

#if defined(CONFIG_NRF_GRTC_TIMER_CLOCK_MANAGEMENT) && NRF_GRTC_HAS_CLKSEL
#if defined(CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC)
Expand Down
9 changes: 9 additions & 0 deletions include/zephyr/arch/riscv/irq.h
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Original file line number Diff line number Diff line change
Expand Up @@ -83,6 +83,15 @@ extern void z_riscv_irq_vector_set(unsigned int irq);
z_riscv_irq_vector_set(irq_p); \
}

#ifdef CONFIG_PM
extern void arch_isr_direct_pm(void);
#define ARCH_ISR_DIRECT_PM() arch_isr_direct_pm()
#else
#define ARCH_ISR_DIRECT_PM() \
do { \
} while (false)
#endif

#define ARCH_ISR_DIRECT_HEADER() arch_isr_direct_header()
#define ARCH_ISR_DIRECT_FOOTER(swap) arch_isr_direct_footer(swap)

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